CDCE6214-Q1: How to provide proper termination for CDCE6214-Q1 OUT_P & OUT_N channels

murali Penta

Part Number: CDCE6214-Q1

Hi TI team,

Since I am very new to use clock generator IC's, the following queries came into my mind.

Can you please clarify following my queries on CDCE6214WRGERQ1.

1. When I saw EVB schematic of CDCE6214WRGERQ1, I have observed that OUTx_P & OUTx_N lines contains a series 0ohm resistor and 0.1uf capacitor connected .

Whether these are mandatory to implement in designs. If answer is yes, may I know the reason for using 0ohm resistor and 0.1uf cap.

Majorly the role of 0.1uf capacitor I would like to know.

2. OUT1_P & OUT1_N can be used as LVDS-like/LP-HCSL/LVCMOS Output.

In EVB of CDCE6214WRGERQ1 OUT1 channel does not contains series capacitor, is this configured only for LVCOMS purpose in EVB ? please confirm.

If we want to use OUT1 channel as LVDS-like/LP-HCSL, de we need to add series resistor and series captor as like OUT2 & OUT4 channels in EVB? Please confirm.

3. Can we use single 100ohm resistor across OUT_P & OUTN channel, or we need to provide split termination as per CDCE6214WRGERQ1 EVB ( 2 x 49.9 ohm and 0 ohm option to GND)

If answer is split termination resistors (2x 49.9 ohm) , may I know the reason.

4. CDCE6214TWRGETQ1 IC unused OUT_P & OUT_N channels can we left open or tie to a test point ?
If answer is No, please suggest termination process for unused OUT_P & OUT_N channels.

Thanks & regards,

Murali penta.

over 2 years ago

0 vicente flores prado over 2 years ago

TI__Mastermind 28982 points

Hi Murali,

1. Purpose is for AC coupling of output signal. The 0hm resistor is a placeholder for various terminations. For Example, for single ended outputs a 33 ohm resistor is common to attenuate unwanted reflections. EVM is shipped with 0 ohm and can be reworked as needed.

2. Correct, OUT1 does not contain any onboard termination resistors on EVM. Follow recommendations in DS for correct terminations.

3. Yes, single 100 Ohm resistor is fine.

4. Unused outputs should be left floating. The output drivers can be individually disabled or the channel powered down as well.

Regards,

Vicente

0 murali Penta over 2 years ago in reply to vicente flores prado

Prodigy 60 points

Hi Vicente,

Thanks for quick response.

Regarding Point no 1 & 2 Can you please provide few more inputs.

1. I need more clarity on what is purpose of 0.1uf capacitor in the OUTx_P & OUTx_N lines.
And When we are using these outputs as differential channels what is your suggested value for series resistor.

2. Please suggest where to be placed these components (series & parallel termination resistors and 0.1uf capacitor) in the PCB placement.

those should be placed close to clock generator IC PINs side (CDCE6214TWRGETQ1) or close to SOC PINs side ? Please confirm.

Thanks & Regards,

Murali Penta

0 vicente flores prado over 2 years ago in reply to murali Penta

TI__Mastermind 28982 points

Hi Murali,
1. The purpose of the 0.1 uF capacitor is to AC couple the output signal which blocks all DC content and allows only the AC content through.

The termination is dependent on your receiver. Say for example your receiver input is LP-HCSL as well, we don't require any termination to GND. The value of Rs is dependent on customer design. I recommend 0 ohms placeholder to futureproof.