XO 24MHz,PRIREF input 8kHz,OUT7 output 19.2MHz,enable ZDM
Does OUT7 have to be split by APLL1 to achieve phase synchronization?
attachment file is my configuration file.Whether it can meet the requirements?
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XO 24MHz,PRIREF input 8kHz,OUT7 output 19.2MHz,enable ZDM
Does OUT7 have to be split by APLL1 to achieve phase synchronization?
attachment file is my configuration file.Whether it can meet the requirements?
Hi Luffy,
I will ask our DPLL expert to look into this tomorrow.
One thing I would like to mention: I opened up ,tcs file you attached, I don't see a 19.25 MHz output on CH7 or an 8 kHz reference?
Regards,
Vicente
Hello Vicent
Sorry about the wrong file.this is the new one.
XO =24.000 MHz, REF=8KHz,CH7 = 19.2 MHz.tcs
BR.
Hi,
Are you looking to achieve phase alignment between the PRIREF and OUT7 or phase synchronization?
Regards,
Jennifer