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LMK05318B: lmk0531b jitter cleaner configuration

Part Number: LMK05318B

XO 24MHz,PRIREF input 8kHz,OUT7 output 19.2MHz,enable ZDM

Does OUT7 have to be split by APLL1 to achieve phase synchronization?

attachment file is my configuration file.Whether it can meet the requirements?

XO =24.000 MHz, REF=8KHz,CH7 = 19.25 MHz.tcs