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LMK05318: Use LMK05318 as syncE recovery clock jitter clean

kong depeng
Prodigy 10 points
Part Number: LMK05318

Hi,

I have a clock jitter issue here.

 I used the syncE recover the clock for clock transmission, but when I connected too many devices  in series(more than 8), the PHY  don't work. After measurement, it was found that as the clock transmit, the jitter increased.

 I would like to use LMK05318 as a jitter cleaner chip, as follows:

https://e2e.ti.com/blogs_/b/analogwire/posts/solving-synchronization-challenges-in-industrial-ethernet

 

 My  recovered clock is 25Mhz,that means, the input of lmk05318 is 25Mhz,and output is 25Mhz.

Here is my question:

1、Does LMK05318 meet my needs for clock jitter clean?

2、the VCXO is needed?

3、Can I complete the testing on the LMK05318 EVM, I found that there is only a  48.0048-MHz XO on board.

 

Best Regards,

Kevin

  • 0
    TI__Genius 11205 points

    Hi Kevin,

    1. What is your jitter integration range of interest and requirements?
    2. A VCXO is not needed/not supported for the LMK05318B. Instead, it requires a low-cost XO or (for higher frequency stability) a TCXO/OCXO input.
    3. You will need to rework the board to depopulate the resistor which connects the 48.0048 MHz XO to the device.
      1. Depopulate R42 then directly connect your external XO input into J33.
    4. We recommend using the latest silicon: LMK05318B.

    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 10 points

    Hi Jennifer,

    Thank you for your reply.

    • What is your jitter integration range of interest and requirements?

    The requirements as follows:

    a.it support Digital Holdover on Loss of Reference,that means if the input clock (25Mhz)interruput,Output clock(25Mhz) continuous output.

    b.The output and input have the same frequency.

    c.The Peak-to-Peak Jitter is less than 200ps.

    And back to the use of LMK05318,

    1.If a TCXO/OCXO input,Is the usage plan correct?

    2.what the difference between LMK05318 and LMK05318B, I have bought a LMK05318EVM.Are they compatible with software and hardware?

    Regards,

    Kevin

  • +1 in reply to kong depeng
    TI__Genius 11205 points

    Hi Kevin,

    1. The LMK05318B can be used for this application. The diagram input/output flow looks good to me.
    2. We urge customers to move away from non-B and use -B version instead to ensure supply. Also, the -B supports lower frequency inputs (< 2 kHz) and has configurable APLL1 & APLL2 denominators to allow for more frequency options. The tunable APLLx denominator feature is used for applications that do not require the DPLL. Software can be translated from non-B directly into -B (but not necessarily from -B into non-B due to the added features).
    3. You can test with the non-B EVM and you will get similar performance as the -B. 

    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 10 points

    Hi Jennifer,

    Thank you for your reply.

    About LMK05318B,perhaps I can replace LMK05318 with LMK05318B on EVM for testing.

    Here is my last question:

    For my case,Is there a requirement for selecting the frequency of TXCO?Datasheet LMK05318 9.3.1 as follows:

     

     

    Is that means I should choose from the above frequencies?

     

    Regards,

    Kevin

  • 0 in reply to kong depeng
    TI__Genius 11205 points

    Hi Kevin,

    Yes, you may choose from the above list. We have tested with 38.88 MHz, 48 MHz, 48.0048 MHz, and 54 MHz frequencies in our labs. The higher the TCXO frequency, the higher the phase detector frequency (PFD) we can choose. The higher the PFD, the lower APLL noise and better output jitter performance. Make sure the PFD specifications are met.

    What matters is that the TCXO frequency chosen has a fractional relationship with the APLL1 (VCO1 = 2500 MHz), If there is an integer relationship, then there is a risk of Integer Boundary Spurs (IBS) on the outputs when the DPLL is enabled, which could affect the jitter performance and output stability.

    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 10 points

    Hi Jennifer,

    Thank you for your reply.

    About TCXO, Will the stability of TCXO affect output stability in Lock Mode? Or just affect in Free-Run Mode and Holdover Mode?

    Regards,

    Kevin

  • 0 in reply to kong depeng
    TI__Genius 11205 points

    Hi Kevin,

    When the outputs are locked to the DPLL inputs (PRIREF/SECREF), the outputs have the ppm accuracy of the reference. When the outputs are locked to the XO input, the outputs have the ppm accuracy of the XO/TCXO. The TCXO stability matters during holdover and free-run mode.
    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 10 points

    Hi Jennifer,

    Thank you for your patient answer.

    I have received the LMK05318EVM Board and tested the effect of jitter clean function. Evm solved my problem perfectly.Devices  in series(more than 8) work well.

    Thanks again.

     Regards,

    Kevin