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LMK04610: Multi chip synchronization for JESD204 interface

MANIKANTA SRINIVAS
Prodigy 150 points

Part Number: LMK04610
Other Parts Discussed in Thread: LMK1D2104

Hi TI team,

I have a generic question on the JESD204 interface for the Multi-chip synchronization.

Let's say, I'm using LMK04610 timing device in our application. 

The DEVCLK and SYSREF are generated by using this clock chip, and definitely, the setup/hold requirements are meeting in this.

So my question here is, I have some 4 number of transceivers in my design and each device requires DEVCLK and SYSREF clocks.

Did I really use a PLL to generate those clocks or any FANOUT buffer of JESD204 Compliant is fine?

Thanks,

Manikanta

  • 0
    TI__Mastermind 32152 points

    Hi Manikanta, 
    You can use a buffer but you will still require an additional JESD204 compliant clk generator (Like LMK04610) to generate the clocks you require which will be inputs to the fanout buffer. 

    Regards, 

    Vicente 

  • 0 in reply to vicente flores prado
    Prodigy 150 points

    Hi Prado,

    I'll be using LMK04610 as my design, and one of the outputs will go and feed to the FANOUT buffer and generate the multiple DEVCLK and SYSREF combinations from that as I require 4 pairs of these clocks for my transceivers.

    But my question here is, the FANOUT BUFFER is enough to manage the proper synchronization. 

    Thanks,

    Manikanta

  • 0 in reply to MANIKANTA SRINIVAS
    TI__Mastermind 34910 points

    Manikanta,

    I think you can make JESD synchronization work with any standard 1:n fanout buffer, as long as you are cautious how much device-to-device skew you can afford. Each fanout buffer has a total propagation delay which is determined by temperature, voltage, and process variations, which manifests across multiple devices as device-to-device skew. As long as the device-to-device skew of the buffers is small relative to the required setup/hold time for your JESD fanout, there should be no problems. Even if it is larger than desirable, the temperature and voltage components can typically be eliminated by holding the fanout buffers at similar temperatures and supply voltages, leaving only process variation... but most vendors (TI included) have a difficult time separating out sources of skew into temperature-/voltage-dependent and process-dependent.

    To avoid challenges in estimating separable contributions to device-to-device skew, we typically recommend LMK1D2104 or something similar in that family for mutual DEVCLK/SYSREF fanout: since the device consists of two independent 1:n fanout buffers on the same device, the temperature/voltage/process variation is necessarily very small, and as a result the skew between the two fanout segments is very small (<20ps).

    On the other hand, LMK04610 has both digital and analog delay compensation available in each output channel at relatively fine granularity. So if the transceivers are separated by considerable distance, or have to route across a cable array or are otherwise on separate subassemblies, it might make more sense to use LMK04610 channels to help compensate the delays up to the point where fanout becomes possible. If your use case involves all transceivers close together or over well-controlled cabling delays, one DEVCLK/SYSREF pair to a fanout buffer is probably easiest.

    Regards,

    Derek Payne