We use only secondary input for xtal input and VDD_PRI_REF is left open, and PLL is not locked.
Do we have to connect VDD_PRE_REF to VDD if we don't use the primary clock input?
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We use only secondary input for xtal input and VDD_PRI_REF is left open, and PLL is not locked.
Do we have to connect VDD_PRE_REF to VDD if we don't use the primary clock input?
Fujimoto-san,
Is the REF_SEL pin pulled high? If this pin is pulled low, then the PRI_REF inputs are selected for the PLL.
Please see this post for guidance on connecting the inputs when unused: https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/283561/termination-of-unused-clock-inputs-on-cdcm6208
Thanks,
Kadeem
Hi Kadeem,
Thank you for your replay. The REF_SEL has been pulled high since we tested at the first time, which means the secondary input has been selected.
We continued to investigate the issue on our side and found giving power to VDD_PRI_REF was needed even if we did not use the primary input.
Best,
Fujimoto
Fujimoto-san,
Thank you for letting us know. I will record this so that we can update the datasheet with this information.
Thanks,
Kadeem