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TLC555: slew rate specification for TRIG input

Part Number: TLC555

Hi team,

My customer is considering to use this device with monostable operation and have a question about the TRIG input.

In the below E2E thread, it is spec'd that the TRIG input pulse width has to be larger than 100ns. My customer wants to know if there is a spec for the rise/fall time, or the slew rate specification.

https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/857914/faq-how-do-i-design-monostable-timer-circuits-using-lmc555-tlc555-lm555-na555-ne555-sa555-or-se555

Regards,

Ohashi

  • Hi Ohashi-san,

    The only guidance on rise/fall time I can find is from the same FAQ post you referenced. It is a slightly different monostable configuration in which the trigger pin is connected to the reset. In this configuration, the recommended rise/fall time is 1μs or less.

    You may follow this guidance as a maximum rise/fall time for monostable trigger input. However, depending on your desired frequency, the rise/fall time may need to be much faster as the minimum monostable pulse width is also 1μs. Your rise/fall times must accommodate the minimum 100ns LOW trigger width and the minimum 700ns HIGH trigger width to the end of the pulse time.

    Regards,

    Zach

  • Hi Zach,

    Thanks for your support. My customer has additional questions.

    • What will be the definition of the rise/fall time in this case?
    •  If the rise/fall time does not meet the recommended value, what would happen? Will it oscillates?

    My customer have heard that when input a slow signal to the logic IC and when exceeding the input threshold, the logic IC operates and momentarily draws current, shaking the power supply GND. I have heard that the output will be unstable and oscillates. Does the same thing happen with the TLC555? Or, if the trigger signal is fluttering due to noise, does the operation become unstable if the input threshold is exceeded multiple times in a short time? 

    Regards,

    Ohashi

  • Hi Ohashi-san,

    1.) What will be the definition of the rise/fall time in this case?

    Typically the rise/fall time is defined as the time required for a pulse to rise or fall between 10% and 90% of the steady-state value.  Your rise/fall times must accommodate the minimum 100ns LOW trigger width and the minimum 700ns HIGH trigger width to the end of the pulse time.

    2.) If the rise/fall time does not meet the recommended value, what would happen? Will it oscillates?

    In the configuration shown in my last post, if the fall time exceeds 1μs there may be an unwanted output pulse as shown below. The output does not oscillate.

    In the typical monostable configuration, if the trigger doesn’t return high before the end of the pulse, the output will be extended until trigger goes high. The key specification is the length of time the trigger is high or low as shown in the table. You may design your rise/fall times to accommodate the necessary trigger width for your desired timing frequency.

    3.) My customer have heard that when input a slow signal to the logic IC and when exceeding the input threshold, the logic IC operates and momentarily draws current, shaking the power supply GND. I have heard that the output will be unstable and oscillates. Does the same thing happen with the TLC555?

    Can you specify which logic IC you are referring to? Is this some other 555 timer? The speed of the voltage ramp at the threshold pin is determined by the external RC network. With large RC values this voltage ramp can be very slow. Once the threshold pin ramps higher than 2/3 of VCC, the output pulse is reset as long as the trigger pin has been high for at least 700ns. This action discharges the capacitor voltage and is essential to the function of the 555 timer. Ensure that your device has a good low-impedance ground connection in your PCB layout that is able to sink the current from this capacitor discharge. The output does not oscillate.

    4.) Or, if the trigger signal is fluttering due to noise, does the operation become unstable if the input threshold is exceeded multiple times in a short time? 

    The trigger must be kept high for a minimum of 700ns in order for the device to recognize the trigger signal. For proper monostable operation you must ensure that your trigger is high for a minimum of 700ns before the pulse width ends. If your trigger is not high for at least 700ns the output will be extended until the trigger goes high. The trigger input is level-sensitive not edge sensitive.

    The 555 timer is level-sensitive due to the internal trigger and threshold comparators connected to an internal flip-flop. The threshold pin must be higher than 2/3 of VCC and the trigger pin must be higher than 1/3 of VCC in order to trigger the reset of the output pulse. If the output pulse is triggered high, the external capacitor must be charged up to 2/3 of VCC before the output can be reset again. The output does not oscillate.

    Regards,

    Zach

  • Hi Zach,

    Thanks for your support. My customer has additional question about this.

    1. In the configuration shown in my last post, if the fall time exceeds 1μs there may be an unwanted output pulse as shown below.

    The customer will keep Reset HIGH and only changes Trigger for HIGH/LOW. With this configuration, if the Trigger rise/fall is slower than 1us, what will likely to happen? Same with the RESET=Trigger configuration? (Will unwanted pulse occur?)

  • Regards,

    Ohashi

  • Hi Ohashi-san,

    In the configuration with reset = trigger, the unwanted pulse may occur when the fall time is slower than 1μs.

    In the configuration with reset always high and the trigger is pulsed high/low, you must follow the minimum high/low trigger width recommendations. There is not a rise/fall time specification for this configuration.

    Regards,

    Zach