I want to use a VXCO which is single-end clock output, and I find that CDCM7005 provides VBB Bias voltage output for Singel-ended input signals.I want to know how to use "VBB" pin when Singel-ended input signal is us
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I want to use a VXCO which is single-end clock output, and I find that CDCM7005 provides VBB Bias voltage output for Singel-ended input signals.I want to know how to use "VBB" pin when Singel-ended input signal is us
VBB can indeed provide the biasing for the unused, 2nd input. I think you should do the following:
VCXO output --> AC coupling cap --> VCXO_INP
VCXO_INP --> 10kΩ --> VCXO_INN
VBB --> VCXO_INN
VBB --> decoupling cap --> GND
So basically the VBB signal biases the N-input, and you AC couple the VCXO to the P-input. The 10k allows to also bias the P-input the the exact same voltage as the N-input, so that the input duty cycle will be exactly 50%.
Best regards, Fritz