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LMK04832-SEP: programming differences for commercial/SEP/SP

Adam Daluga
Expert 6385 points
Part Number: LMK04832-SEP
Other Parts Discussed in Thread: LMK04832, , LMK04832-SP

Hello,

I had a question about the LMK-04832 along with the LMK-04832-SEP and LMK-04832-SP

I am curious if programming this device will be exactly the same for all three or if there are any differences? I have also noticed that the pinouts are the same except for the –SEP having a different pin 1 than the other two.

 Finally does TI have any recommendations when it comes to radiation hardened/tolerant oscillators?

 Thanks,

Adam

  • 0
    TI__Mastermind 33730 points

    The device programming will be virtually identical across all three devices. The only notable differences are that LMK04832 forces R325[2:0]=0 and R374[4]=0, while LMK04832-SP and LMK04832-SEP expose these as Fin0 control fields. You can in fact use the TICS Pro profile for LMK04832-SP (or -SEP, coming later today if all goes well!) to program the LMK04832, and vice versa.

    LMK04832-SEP package is rotated 180°, otherwise it's the same pinout arrangement. It had something to do with internal bondwire lengths at the corners and the allowable offsets on the leadframe... we should probably put a note on the figure or a footnote in the pinout table indicating the 180° rotation.

    At this time, TI does not have any radiation hardened/tolerant oscillators in our portfolio. TI has worked with Vectron in the past to create custom space-grade VCXOs and VCOs; this was quite a while before I started supporting LMK04832, so unfortunately I don't know much more than that. More recently Rakon has begun offering a sizable portfolio of all kinds of HiRel oscillators including OCXOs, TCXOs, VCXOs, and VCOs.

    While I don't have any specific part numbers, I will note generally that I see a lot of dual-loop LMK04832 designs utilizing some family of 10MHz sine-wave OCXOs as the CLKin source - and I will caution you that the slew rate of these 10MHz oscillators (2 * pi * f * Vpk = about 0.1V/ns for a 7dBm sinewave) is typically marginal for keeping PLL1 in lock. The CLKin buffer 1/f noise greatly benefits from input slew rate increases, leading to our typical slew rate recommendation of 0.5V/ns. We've seen that the low-frequency sinewave oscillator slew rate can be improved even just by sticking a standard CMOS inverter between the oscillator and the CLKin buffer; because the 1/f contribution from a single inverter stage is negligible compared to the improved 1/f achieved from the increased CMOS slew rate, and because the CMOS inverter noise floor is jitter-cleaned away by a VCXO above the PLL1 loop bandwidth. For single-loop mode this kind of consideration is rarely required, since single-loop mode input clocks tend to be 10x higher frequency and therefore 10x higher slew rate.