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LMK04832: When VCO frequency is used directly IO outputs 1/3 of VCO

Sercan Aydogmus
Prodigy 10 points
Part Number: LMK04832


Hi,

We are designing a signal processing board including LMK04832. We have a problem such that when we push the boundaries i.e. program the pll to output the VCO frequency directly (in our case 3GHz), the output is 1/3rd of VCO frequency, although we do not program the divider to 3. We get good results with divider 2, 3, 4 and so on, i.e the output frequency is set 1.6GHz successfully. Only when the divider is 1, the output does not give correct frequency. We believe the VCO locks correctly, since simultaneously we get 400GHz at another output and so on.

Can you please help to find the problem.

Thanks

Sercan

  • +1
    TI__Mastermind 33840 points

    This is likely because you do not have duty cycle correction (DCC) enabled. DCC is required for divide-by-1 use case and is strongly recommended even if the bypass path is used to prevent divider capacitive coupling spurs.

    The latest version of TICS Pro evaluation and programming software released just a few weeks ago includes more explicit instructions with regards to how to operate divide-by-1 mode. I recommend using the new version of the software if possible.

  • 0 in reply to Derek Payne
    Prodigy 10 points

    Hi Derek,

    Thanks for your support. As you told the problem was DCC. After enabling DCC we got 3GHz clock running.

    The new version of the software is far better than the old one since it gives warnings and it is more stable than the older. The old one sometimes does not update some fields and mislead the user. Anyhow, thanks again.

    Sercan