• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 21 subscribers
  • Views 350 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCDB800: 8 OUTPUT CLOCK BUFFER

SHEKHA SHOUKATH
Intellectual 520 points
Part Number: CDCDB800


Hi,

In our design x16 lane PCIe is splitted into 4x4 lane ports at endpoint, so we need a clock buffer.

I opted CDCDB800 ,since each x4 should support dual port feature, thus x16 lane to 4x4 , will work as 8x2 lane, thus 8 REFCLK are required.

Can we simply connect REFCLK_IN from X16 lane PCIe slot(root) to input pin of CDCDB800?

Thanks and Regards,

Shekha Shoukath

  • 0
    TI__Genius 10995 points

    Hello Shekha,

    SHEKHA SHOUKATH said:
    Can we simply connect REFCLK_IN from X16 lane PCIe slot(root) to input pin of CDCDB800?

    To clarify this sentence/question, you can feed in the PCIe CLK into the CDCB800 and the CDCB800 will output 8 copies of that REFCLK. 

    Regarding the rest of your reasoning regarding the x16 lanes and the different splits that can be done, can you please create/attach a block diagram demonstrating this clock tree/different options. I'm a bti confused as what exactly you mean and the amount of clocks required/lanes needed etc. Thanks!

    Best,

    Andrea