LMX2594: LMX2594 Clock Input

Harika balla

Part Number: LMX2594
Other Parts Discussed in Thread: LMX2820

Hi all,

I am using the below clocking scheme in my design.

Since LMX2594 accepts CLKIN Voltage (2VPP) providing an attenuator at the TCXO output to match the voltage level of the LMX2594 CLK Input

Can the attenuator affect the phase noise after maintaining the 50-ohms trace length impedance at clock output?

Below is the clock scheme and the TCXO part number.

over 2 years ago

0 Noel Fung over 2 years ago

TI__Guru** 119830 points

Hi Harika,

The attenuator might affect the slew rate of the CMOS clock, as a consequence, PLL noise might be slightly higher. At 10MHz, I think this effect should be small, maybe it is relatively obvious when the clock frequency is 40MHz.

Suggest use 0201 component to build the attenuator, that should minimize parasitic capacitance.

0 Harika balla over 2 years ago in reply to Noel Fung

Prodigy 80 points

Hi Noel,

Can we decrease the phase noise of LMX2594 by providing the Higher reference frequency input to LMX2594?

0 Noel Fung over 2 years ago in reply to Harika balla

TI__Guru** 119830 points

Hi Harika,

Definitely better with a higher input clock. First of all, slew rate is higher at higher frequency. Secondly, you could have a higher fpd with higher input clock frequency, as a result, N divider is smaller, PLL in-band noise could be smaller.