Part Number: LMX2820
Other Parts Discussed in Thread: LMX2594
Hi,
I have several questions related to LMX2820 device in SYSREF Repeat Mode.
1) I can make a conclusion from the LMX2820 datasheets that in SYSREF Repeat mode the SYSREF signal from SRREQ pins is reclocked by F_interpolator (with programmable delay) and passed to SROUT pins. I have attached a screenshot with block diagram from the datasheet.
But on the Help page of TICS Pro software it is stated that in SYSREF Repeat Mode the SYSREF signal will be passed through to SROUT without reclocking. On the other hand, there is a clock diagram for SYSREF Repeat Mode and the SROUT delay specified regarding to RFOUT rising edge. How it is possible without reclocking of SYSREF? I have attached a screenshot form TICS Pro help for SYSREF.
So I am a little confused due to these disagreements of presented information from two different sources .
It is important for my task that SYSREF must be reclocked by RFOUT signal (or it’s sub-divided version) in order to have deterministic Setup/Hold timings between reclocked SYSREF and RFOUT signals. Can the LMX2820 in SYSREF Repeat Mode meet these conditions?
2) The similar, but older device – LMX2594 – has some limitations in SYSREF Repeat mode. According to datasheet, in SYSREF Repeat mode the SYNC mode must be turned ON and INCLUDEDDIVIDE (a part of the channel divide) must be set to 4 or 6. It does not meet my requirements because in my case the channel divide = 1. Are there the same restrictions for LMX2820? I have not found such information in LMX2820 datasheet. And it is not so clear from Block diagram in TICS Pro software.
Regards, Boris.
