I would like to ask a question for the CDCE925.
Now we measured the frequency of the output clock from the CDCE925 as follows.
・Measurement result
In Xtal mode (Vctrl=1.8V) 26.9992MHz
In VCXO mode (Vctrl=0 V) 26.9992MHz
In VCXO mode (Vctrl=0.9V) 27.0011MHz
In VCXO mode (Vctrl=1.8V) 27.0019MHz
・Fixed conditions
CDCE925 external reference crystal 25.000MHz 10pF
CDCE925 output clock frequency setting 27.000000MHz
CDCE925 internal load capacitance register setting 8pF
* Other than OFFSET=01h, bit3-2 INCLK settings are not changed.
In the Xtal mode, the internal load capacitance in the CDCE925 seems to be the maximum which is the same as when Vctrl=0V in the VCXO mode.
Is our understanding correct?
If so, we think that we should change the output clock frequency setting for CDCE925 when in the Xtal mode, because of the internal load capacitance.
So, please let me confirm the internal load capacitance in the Xtal mode.