• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 21 subscribers
  • Views 630 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

LMX2572: Programming sequencing of LMX2572 chip to generate RF out

LMX2572: How to calculate the N divider value and PLL_NUM and PLL_DEN to get the desired output

Vanshaj Kaistha
Prodigy 40 points
Part Number: LMX2572

Hi everyone i am using the EVAL board of the LMX2572 but i am unable to understand the formula to calculate the N divider and PLL_NUM/PLL_DEN as well as the calculation behind configuring the register of the given terms. with respective value.
or i can put my question like this :if i want to get a desired frequency from the chip what calculations i have to do and what values will be configured in the register

  • +1
    TI__Mastermind 29022 points

    Hi Vanshaj
    There are mathematic relationships for all these values. 
    Preferably, you want your N divider value to be as as small as possible with your PFD frequency to be as large as possible. 

    VCO_freq = ( N divider / R divider ) * OSCin
    Say you wanted a 6GHz VCO frequency and your OSCin frequency is 100 MHz

    Therefore 6GHz = (N / R ) * 100 MHZ
    N / R = 60

    But remember, typically we want N to be as small as possible in this case, the smallest value is 60 with an R divider value of 1. 

    Many times are devices have input doubles in the input path that can double the PFD frequency (better) which will also divide our N divider by two (what we want)

    We also have TICSpro GUI which can be used to control our EVM, the GUI updates corresponding values as you edit certain parameters: 

    Here are some links with more info: 
    https://www.deanbanerjeepll.com/files/Deansbook6.pdf

    https://www.ti.com/video/series/precision-labs.html (Clocks and Timing) 

    Regards, 

    Vicente 

  • 0 in reply to vicente flores prado
    Prodigy 40 points

    Hi Vicente,

    There is one more thing i would like to know is MASH order and PFD_DLY_SEL which ar ebeing used for Minimum N Divider Restrictions, i was going through the data sheet but unable to understand the proper working of it i have used the TICSpro GUI also for this purpose but i am still unable to understand. Hop you can help. 

    Thanks. :)

  • 0 in reply to Vanshaj Kaistha
    TI__Mastermind 29022 points

    Hi Vanshaj, 
    What are you asking here exactly? 

    For each VCO frequency range, their is a corresponding minimum N divider value and PFD_DLY_SEL for each mash order.

    Mash is is a sigma-delta modulator that gives you control over the the fractional divider with mash order being the order you want the fractional divider at. 

    Regards, 

    Vicente