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LMK04832: RESET/GPO functionality.

Part Number: LMK04832

Hello,

I'm little bit confused with RESET/GPO (pin 5) functions:

1. I see in register 0x14A: the default value is 2, i.e. "input with pulldown resistor". Does it mean the default function is "RESET" and default active level is High? 

2. If this pin is reprogrammed to be GPO, how reset can be provided to the LMK04832 at the runtime? 

3. Is the external Power-On-Reset signal must be applied to LMK device for correct operation or may be LMK device has its own internal Power-On-Reset circuit?

Please, clarify

Thanks,

Alex

  • 1. I see in register 0x14A: the default value is 2, i.e. "input with pulldown resistor". Does it mean the default function is "RESET" and default active level is High? 

    Correct.

    2. If this pin is reprogrammed to be GPO, how reset can be provided to the LMK04832 at the runtime? 

    There is a self-clearing RESET field in R0[7] which, when written high, behaves the same as if the RESET pin was pulled high. The reset condition clears once the next register write begins.

    3. Is the external Power-On-Reset signal must be applied to LMK device for correct operation or may be LMK device has its own internal Power-On-Reset circuit?

    There is an internal power-on reset that handles power-sequencing, independent of the RESET pin. The RESET pin is optional, and is available for cases where pin-mode RESET makes more sense in the application - sometimes there's power sequencing issues, sometimes the RESET signal is used by both LMK04832 and some nearby SPI bootloader MCU. We recognize not everyone will use it like this, so we give the option to configure it as a GPO if the reset function is unused, and to issue a RESET over SPI by setting R0[7] = 1.

  • Hi Derek,

    Thank you for the explanation, it is very helpful.

    Now I have another question:

    Once RESET/GPO have been configured to GPO function, is there a possibility to program its value to logic High?

    I see in register 0x14A there is only Logic Low (default value) option. All other options are internal statuses.

    I wanted to use this pin to control external circuit. I need to set logic High at the end of LMK's configuration to enable external reference clock oscillator device.

    May be there is another GPIO exist in LMK, available to programing over SPI?

    Thanks,

    Alex

  • You can set the output to inverted push-pull instead of normal push-pull, which will flip the logic low to a logic high. Unfortunately there's no inverted open-drain option, as far as I'm aware.

  • Hi,

    What logic level will appear on RESET/GPO pin after power On and before any manipulations with registers? I guess, it will be logic Low, since it's default state is input with pull down resistor, correct?

    Could it be used to pull Low the OE input of my external ref clock oscillator? 

    If - yes, then I can set RESET/GPO as inverted output with logic Low value and thus I will get logic High on it, is it right?

    If all above is correct, it may work for me.

    Regards,

    Alex 

  • The input with pulldown will pull the pin to GND, so it would be logic low on startup. But the pulldown resistance is pretty large, >50kΩ. If there's any equivalent pullup or pulldown structure in the OE pin of the external ref clock oscillator, I don't think this will work by itself. I recommend putting an external 10kΩ to GND on the RESET/GPO and OE pin net - this is a low enough resistance that it will defeat pretty much any pullup or weak biasing present in the oscillator, and it's no trouble for the LMK04832 to drive a 10kΩ impedance from the RESET/GPO pin.

    Then, as you surmise, you can set RESET/GPO pin as inverted output with logic low mux value, and the pin will be set to logic high (3.3V I/O).

  • Great!

    Thank you for help.

    Alex