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LMK1D2102: Input slew rate

Part Number: LMK1D2102

Hello team,

What is the input slew rate for differential clock input?
I could only find slew rate requirement for single-ended input, which is 0.05V/ns (MIN).

Is there any jitter performance vs input clock slew rate data?
I believe jitter performance is affected by input slew rate.

Best Regards,
Kei Kuwahara

  • Kei,

    I will look into this and get back to you by the end of the week.

    Regards,

    Will

  • Kei,

    The differential slew rate minimum would be twice the single-ended rate, so .1V/ns.  Although this particular datasheet does not mention the effect of slew rate on jitter, in general yes, higher slew rate will result in better jitter.  For example the datasheet jitter number was taken with a 1.5V/ns signal.  

    Regards,

    Will

  • Hello William-san,

    Thank you for your answer!

    My customer wants to know the phase noise performance for their input clock condition.

    Would it be possible to test at your lab, and measure the phase noise/jitter performance on the condition below?

    • Input clock frequency: 245.76MHz (Single-end, Sine wave)
    • Input clock slewrate: 0.54V/ns
    • Input clockpower: +5dBm
    • Target Phase noise: -160dB/Hz @ 100kHz offset

    Best Regards,
    Kei Kuwahara

  • Kei,

    I should be able to test this by the end of the week.

    Regards,

    Will

  • Kei,

    The slew rate is one factor in the phase noise performance of the LMK1D2102.  The most important factor to determine the output phase noise would be the input signal itself.  As I do not have you exact input source I cannot accurately predict the output phase noise at a specific offset.  

    I did a quick test in the lab with an LMKDB1212 which should have similar performance.

    Input - 5dBm 245.76MHz - 19.698 (12kHz - 20MHz) - Phase Noise @ 100kHz - 158.5 dBc/Hz

    Output - 54.082 (12kHz - 20MHz) - Phase Noise @ 100kHz - 152.1 dBc/Hz

    The additive jitter here is @ 50fs and in this specific test there was a ~6 dbc/Hz increase in the phase noise at a 100kHz offset.  Again to find the true phase noise increase at 100 kHz you would need to test the LMK1D2102 with your specific input signal.

    Regards,

    Will

  • Hi William-san,

    Thank you for testing at your lab.
    Did you test with input signal at 0.5V/ns slew rate?

    Best Regards,
    Kei Kuwahara

  • Kei,

    The slew rate for a sine wave will be derived by the peak voltage level (which is derived from the power level) and the frequency.  Sine Wave Slew rate = 2 π f V. Given that I used 5dB power level and the 245.76MHz frequency, it should have the same slew rate. Again though, this test is not representative of your Target Phase noise as the input is not even at -160 dBc/Hz and to get accurate results you would need to test the LMK1D2102 with your specific input.

    Regards,

    Will

  • Hi William-san,

    Thank you very much for the measurement!

    Best Regards,
    Kei Kuwahara