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LMKDB1108: Input clock slew rate

Kei Kuwahara
Expert 7760 points
Part Number: LMKDB1108

Hello team,

On the datasheet, the input clock slew rate is minimum 0.6V/ns when differential clock. Would it be same for single ended clock, if the amplitude is 300mVpp?

Best Regards,
Kei Kuwahara

  • +1
    TI__Genius 10995 points

    Hello Kei,

    The input slew rate needs to be 0.5x what's shown for the differential input slew rate requirement. So it needs to be 0.3V/ns. This is because for a differential signal you subtract the swig of each pin (pos - neg), which results in double the swing. Let me know if you need anything else.

    Good luck,

    Andrea