Can an output pair, example, CLKout0 and CLKout1, output different frequencies using Device clock?
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Can an output pair, example, CLKout0 and CLKout1, output different frequencies using Device clock?
In most cases the answer is no. CLKout pairs (e.g. CLKout0/1) normally derive the device clock from a common, shared device clock divider. There is one notable exception: if the even CLKout in the pair is in Bypass mode, the divider is bypassed for that clock. So it is possible to run the VCO frequency or the clock distribution frequency alongside a divided clock in the same channel pair. I don't recommend doing this if you are concerned about phase noise or spurs on the bypass mode clock, since the divider right next to the bypass mode mux will induce a very large spur on the bypassed clock. But if a spur at the other clock frequency isn't a concern, and you can use a bypass mode clock, this is permitted.
You could use the SYSREF divider as an additional continuous clock, but the SYSREF divider phase noise is higher than the device clock dividers, and of course the SYSREF functionality will be unavailable.
I suspect you are already aware, but just in case: clocks in the same clock group but in different pairs (e.g. CLKout0/1 and CLKout12/13) share a power supply, but have distinct device clock dividers for each pair. This also causes some spurious coupling between the clock group outputs due to the shared power supply, though at a lower magnitude than the bypass mode spurs described in the exception above.
On a related note, can the paired outputs have unique digital delay for each output using Device clock? Looks like a no but would like to verify.
The digital delay block is combined with the divider block, so CLKout pairs share the same digital delay settings, both static and dynamic. Bypass mode elides the divider and delay block, but since the bypass clock period is the step size for nominal delay steps, that doesn't help much. You could use the SYSREF local delays, but again that imposes the restriction of using the SYSREF divider, a shared block.