TLC556: TLC556 Astable operation

My apologies, I didn't catch that the first Ton would be longer than subsequent ones so here is what I got:

Ton1 = 686s

Toff1 = 318s

Ton2 = 392s

Toff2 = 318s

In my LTSpice simulation the same thing occurs regarding a longer Ton1 vs. Ton2/3/4

Ton1 = 476s

Toff1 = 298s

Ton2 = 303s

The numbers are not as off, but they are still off so my same question still applies...why are my timing values so far off from that of the calculations and what resistor values should I be using to get a total period of 600 seconds (10 min) and a duty cycle of approximately 50%?

My next question then also becomes is there a way to eliminate the extra long first Ton time period of the output?  I understand the output responds to the high and low points of the cap voltage and the first time the cap has to charge it has to go from 0V-8V and not just 4V-8V like subsequent time periods.

Alex,

Thank you for your detailed response.  I am currently using a 680uF, 20%, 25V Electrolytic capacitor from Panasonic -

https://www.digikey.com/en/products/detail/panasonic-electronic-components/EEE-FN1E681UP/11657034?s=N4IgTCBcDaIKIILQDEByBGOA2AHOgqgAogC6AvkA

I measured the capacitor in my circuit and it is measuring 708uF, well within the 20%, but still not 680uF.  Rerunning the calculations and this is what I get for timing:

Ton = ln(2) * (2.49k + 634k) * 708uF = 312s

Toff = ln(2) * 2.49k * 708uF = 311s

reversing the math and solving for the capacitor value with the known timing and for a Ton of 392 seconds the cap value would have to be 889uF...which is outside of the tolerance window and we know the measured value to be 708uF.  NOW, this could be the reason for Toff being 318s though...that would easily line up with the calculated value of 311s.

Ultimately my goal is to have the first stage create a square wave with a period of 600s and then the second stage vary the Pulse Width.  I don't know that I need to have a 50% duty cycle to accomplish this.  if I just adjusted my duty cycle to say 75% would I be able to get away with not having the diode or is this diode required for long pulses like this?

Hi Nicholas,

The bypass diode is generally recommended for duty cycles less than or equal to 50%, so if you increased the duty cycle to 75%, the diode would not be necessary. 

Best regards,

Alex Curtis

Understood.  I was able to go through the FAQ you sent me and it actually had a better way of achieving a the first stage...I now have a stable first stage output, however getting the second stage to work is now an issue.  I seem to be able to configure the 555 into Monostable mode and get a Duty Cycle from 50% to approx 99% but I can't get below 50%.  Is getting below 50% duty cycle not possible?  I have the output of the first stage feeding into an inverter, and then the output of the inverter feeding the Trigger of the second stage.  As in the diagram above you can see I am using a 1Mohm pot in parallel with 4Mohm of resistance to make the pot top out at 800kohm but as I drop the potentiometer resistance down it stops at 50% duty cycle no matter how low I turn the pot.

I guess the better way of describing it is I am putting the second stage of the circuit into mono-stable mode, using the inverted output of the first stage to trigger it.  I want to vary the pulse width of the output of this stage from 0 seconds - 600 seconds (in reality I expect this to not quite reach always off or always on) using a 680uF cap and a 1Mohm pot.  Attempting to reduce the pulse width below 300s (resistance below 400kohm) the pulse width just stops reducing.  I've not tried this in hardware yet, just simulation, since I need to make hardware changes and order new custom hardware first...I'd rather get all my changes in on the next board spin.

Hey Nicholas,

I appreciate the clarification and I think I'm encountering the same issue. I've been working on a TINA simulation for the second stage of your design (representing the output of the first stage as a square wave with a period of 600s), and I'm also running into some convergence issues when I set the 1Mohm potentiometer below 50%.

When I run the transient simulation with the pot set to 40% (400kohm), TINA stops calculating when the threshold voltage reaches exactly 2/3 Vcc (8V).

As far as I can tell, this is an issue with the model of the TLC556. Since the length of the output pulse in monostable mode is proportional to both RA and C (tw = 1.1*RA*C), I'm going to try reducing the size of the timing capacitor and increasing RA to see if that fixes the convergence problem. 

I'm going to need some time to investigate, but I should have some answers for you tomorrow.

Best regards,

Alex Curtis

Thank you, I am glad I'm not the only one seeing it.  LTSpice seems to not have a problem simulating with resistor values below 450kohm, it will complete the simulation (and do it quickly), it will just keep the duty cycle solid at 50%.  I tried to run a simulation using Tina but I've never used Tina before and I kept running into convergence issues and couldn't figure out how to configure it all properly.

I look forward to your response.  If it's just a simulation problem and you believe that if I put it into hardware it would work then I can go on that.  I just want to make sure it's the simulation before I go that route.  Here is my circuit today in LTSpice, R9 is what I'm using to simulate the pot and parallel resistance at the moment...  ultimately I was planning on connecting the wiper and one end of the pot to the circuit and putting a 4Mohm resistor in parallel with those connections to limit the max resistance to 800k.  I still need to figure out how to limit the low end resistance to ~10k, I just haven't gotten that far yet.

Alex,

With a bit more tinkering I was able to get the circuit to work in the simulation with this schematic:

Turns out the problem was the Ton of the first stage was too long for mono-stable mode to work properly for the second stage. It appears that the mono-stable mode expects a very brief pulse (in this case less than 10s long, though I have not tested to see how long I can make it).  Now, the math all works out and the simulation roughly matches the math.  R9 can vary between 10kohm - 800kohm and give me a duty cycle of 1% - 99%. 

A couple of things:

1) I would be interested to know, what is the maximum pulse width of a trigger pulse need to be to correctly trigger the TLC556 in mono-stable mode?

2) Is there anything in this circuit that would cause concern for making this work in real life on a real circuit and not just in a simulation?

3) Can you recommend an inverter chip to use between the two stages?  I need something physically small, uses as little power as possible and is cheap.  I know a 7404 is a Hex inverter...but I only need a single inverter.  It also needs to be able to run on 12VDC, not be limited to 3.3 or 5VDC.

4) I want to use a 1Mohm pot in place of R9...What is the best way to limit the resistance to the range of 10k - 800k.  If it goes over 800k the whole timing breaks down and it doesn't work, If it goes below 10k I assume it will work to a point but the pot I am testing with can go as low as 2.6ohms...I assume that's far to low and will cause issues as well.  I'm, thinking a 10k resistor in series and a 4Mohm resistor in parallel with just the pot...but if there is a better way I'm all ears.

Nick

Hey Nick, 

Nicholas Yunker said:

1) I would be interested to know, what is the maximum pulse width of a trigger pulse need to be to correctly trigger the TLC556 in mono-stable mode?

I verified with Alex that our simulation works if we release the trigger line sooner than the 2/3 charge up time on the capacitor. This aligns with your finding as well. We don't have testing to show the maximum low time on trigger but as a rule of guidance I would release it sooner than the time it take to charge the capacitor to the 2/3 point. I can't see a reason to hold it low for a long period of time since the minimum trigger pulse needed for monostable triggering on TLC device is in the us range as shown below. The device will be triggered and the trigger line can be released shortly after. 

Nicholas Yunker said:

2) Is there anything in this circuit that would cause concern for making this work in real life on a real circuit and not just in a simulation?

Outlined in the monostable FAQ (link below) we describe the maximum pulse time achievable is based on leakages in the capacitor and printed circuit board. 

" The maximum pulse time achievable is based on leakages in the capacitor, leakage and bias current in the timer’s threshold and discharge pins, and leakage on the printed circuit board. The circuit board can be the biggest source of leakage if contaminants or condensation is present. Leakage can also affect the accuracy of the time width because leakage changes the capacitor charging current. The threshold pin in the bipolar timers will start to draw a bias current near the threshold voltage. Therefore the bias current does not affect the charging current until the end of the timing pulse. The charging resistor current needs to be greater than the threshold pin current. The CMOS timers do not have a bias current. Due to the large capacitance needed for long pulse time, a nano-timer can be used as an alternative. They only require a single resistor to set the time delay up to 2 hours and use very little power."

https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/857914/faq-how-do-i-design-monostable-timer-circuits-using-lmc555-tlc555-lm555-na555-ne555-sa555-or-se555

Nicholas Yunker said:

3) Can you recommend an inverter chip to use between the two stages?  I need something physically small, uses as little power as possible and is cheap.  I know a 7404 is a Hex inverter...but I only need a single inverter.  It also needs to be able to run on 12VDC, not be limited to 3.3 or 5VDC.

For an inverter recommendation I could move this post to the logic forum for the logic team to provide an inverter recommendation. 

Below is a link of products with filters for some inverters. 

https://www.ti.com/logic-voltage-translation/buffers-drivers-transceivers/inverting/products.html

Let me know if you would like more assistance with the inverter selection and I can have our logic experts provide guidance on those devices. 

Nicholas Yunker said:

4) I want to use a 1Mohm pot in place of R9...What is the best way to limit the resistance to the range of 10k - 800k.  If it goes over 800k the whole timing breaks down and it doesn't work, If it goes below 10k I assume it will work to a point but the pot I am testing with can go as low as 2.6ohms...I assume that's far to low and will cause issues as well.  I'm, thinking a 10k resistor in series and a 4Mohm resistor in parallel with just the pot...but if there is a better way I'm all ears.

Your idea seems reasonable but would need to be tested. 

Best Regards, 

Chris Featherstone