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LMK04832-SP: POR DEFAULT of Status_LD2 pin

Part Number: LMK04832-SP
Other Parts Discussed in Thread: LMK04832EVM-CVAL

Hello,

The datasheet page 81 described PLL2_LD_MUX POR DEFAULT is Logic Low.
However, LMK04832EVM-CVAL User’s Guide page 13 table 5 says, “. By default, Status_LD1 and Status_LD2 are set to output the digital lock detect status signal for PLL1 and the digital lock detect status signal for PLL2 respectively.”.
Which description is true, the datasheet or EVM user’s guide?

Best regards,

K.Hirano