LMX2594: jitter on the re-clocking circuit

Shunsuke Yamamoto

Part Number: LMX2594

Hi team,

1. My customer plan to output the clock from SysRefReq pin to RFoutB. In SYSREF Setup in the figure below, How much is the jitter in Re-clocking circuit?

2. My customer thinks Divider's clock will be reclocked, how many times behind the above frequency?

3. My customer plans to configure SYSREF Out In Repeater Mode of LMX2594.which signal should be synchronized with the signal which inputs to SysRefReq, OSCin?RFoutA?

4. Regarding the delay Φ on RFoutA, Is this delay Φ always same value? or does the delay Φ have the jitter?

Best regards,

Shunsuke Yamamoto

over 1 year ago

+1 Noel Fung over 1 year ago

TI__Guru** 110680 points

Hi Yamamoto-san,

1. What is the target sysref frequency? Usually customer don't care sysref clock jitter as the frequency is usually low. Anyway, sysref clock jitter will be similar to RF clock.

2. fINTERPOLATOR is the reclocking frequency.

3. SYSREFREQ should be synchronize with OSCin.

4. The delay is configurable. Program JESD_DACx to set the number of delay you want to add.

Each delay has the following duration.

A = IncludedDivide value.

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LMX2594: jitter on the re-clocking circuit