Tool/software:
Hello,
My customer needs to optimize PLL run time using LMX2820.
If you have any reference materials for optimizing the total time from power-on to PLL lock, including SPI setup time, please share.
If the user optimizes the LMX2820, what is the shortest time from power-on to PLL Lock?
Thank you.
JH
Hi JH,
Please refer to the following snippests found on page 30 & 31 of DS. 
We always recommend a minimum of 10ms to allow for LDOs to stabilize. This is a conservative value though to ensure LDOs reach their stable value.
The biggest factor here is your programming time as well as your analog lock time.
Lock time can improve if your SPI speed is fast. We do have some collateral on this:
https://www.ti.com/lit/an/snaa342/snaa342.pdf?ts=1718299245972&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMX2820
Just note these are trying to improve the lock time which means the device is powered on already and has locked to an initial frequency f1 and the end goal is trying to reduce the amount of time it takes to lock to a final frequency f2.
Regards ,
Vicente
