Tool/software:
What is the lowest jitter spec with OscIn = 300 MHz using only PLL2 in single loop mode?
VCO0=2400 MHz. 150 MHz LVDS output required.
PLLatinum Sim gives 136 fs (rms assumed)
Brickwall filter gives 123 fs. (theoretical)
Data sheet Pg20 has example at 245.76 MHz as 109 - 112 fs rms.
Can we practically achieve this?
