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BQ32002: How to make consistent read or write of all date and time information

Part Number: BQ32002
Other Parts Discussed in Thread: BQ32000,

Tool/software:

The BQ32002 (and BQ32000) has separate registers for parts of date and time, all which can be read and written separately over I2C.

But if separate I2C accesses are made, and the SECONDS register wraps from 59 to 00 in between access to the MINUTES and SECONDS registers, then the time that is read or written will be wrong.

However, the registers are placed at consecutive addresses in the I2C address space, whereby a atomic I2C read or write operation starting at address 0x00 and reading or writing 7 bytes will cover all registers for date and time.

Does such an atomic I2C operation for multiple bytes ensure consistent read or write of all registers with data and time information, so that sample at read or update at write is simultaneous for all registers in time and date ?

Reading the Linux driver code indicates that, but it is not described explicitly in the general documentation, so clarification is appreciated.

Thanks in advance :-)

  • Hi Morten,

    I found below diagram in the datasheet, is this what you are referring to atomic read?

    I do believe this is a robust operation, at least I don't get any complaint from customers.

    The max. I2C clock frequency is up to 400kHz, it only takes us 8 / 400k = 20µs to get the SECOND information and another 20µs to get the MINUTE information. So the problem you described will usually not happen. 

  • Hi Noel,

    Thanks for attending to this so swiftly.

    The I2C access diagram you include is exactly what I refer to as atomic read, where a single I2C access reads multiple registers by utilizing the address auto increment.  A similar scenario is possible for write.

    I also assume it is the correct approach for reading and writing a consistent set of date and time registers, though it is not described explicitly in the documentation.

    As you note, then the time difference between reading the SECONDS and the MINUTES registers can be about 20 µs.  If this happens when the MINUTES register changes, which occurs at every 60 seconds, it will results in an inconsistent reading of the MINUTES and SECONDS register set, and thus error in the time.  The probability for such an error is thus 20 µs / 60 s = 333 * 10**-9, or one out of every 3 million readings.  A date and time read can easily be made every 1 ms, thus 1000 times a seconds, and that may be convenient in some systems.  Doing so, will result in 1000 readings/seconds * 3600 seconds/ hour = 3.6 million readings/hour.  So in this use scenario, an error occurs on average about once an hour (MTBF of 1 hour).  That is a very significant error rate, and very likely to be unacceptable in most systems.

    So based on this, I would appreciate if you can help to determine a reliable methods for reading and writing a consistent set of date and time registers.

    Thanks in advance :-D

  • Hi Morten,

    I found a more detailed I2C operation in below link, it should clear your concern. 

    e2e.ti.com/.../latching-of-time-registries-during-readout

  • Hi Noel,

    Thanks for getting back to this.

    The link gives me a "Page Not Found" message.  Maybe it is an TI internal page, since part of the URL says "clock-timing---internal-forum".

    Can you please make it available through this forum ?

    Alternatively you may confirm that doing the atomic I2C operation for read and write ensures consistent date and time access.

    Thanks for your support.

  • Hi Morten,

    Sorry for that, I didn't realize that it is an internal post.

    Details as follows:

    There are actually two copies of the time stored inside the RTC.  One copy is what we call the “shadow” time.  This is the register that is directly incremented by the RTC once a second.  The shadow registers cannot be directly read through I2C.  The other copy of the time is “readable”.  This is the register that can be read by the customer through I2C.

    bq32000 and bq32002 will prevent the time from rolling over during an I2C read or write provided that all the registers are read or written in one I2C transaction (one START, one STOP).  If a customer reads each register as a sequence of separate transactions then the time can rollover between any STOP and START in the sequence.

  • Hi Noel,

    Thanks again for attending to this without delay.

    Also thanks for the thorough and detailed answer. 

    That answer addresses my concern, and it is reassuring that handling of consistent read and write was designed in, as I would expect for a quality product.

    Have a nice day :-)