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Original question:

LMK04832: Multi-LMK04832 Device Synchronization

LMK04832: Power Down Function

Renato Tenorio
Prodigy 20 points
Part Number: LMK04832


Tool/software:

Question on Power Down function.  If I was normal mode and then I assert power down function thru Register 0x002.  How do I bring up the chip back from Power down mode?  Do I need to follow a power up procedure where I need to issue a reset and then reprogram the device again? or should is just a matter of removing from power down mode?

  • 0
    TI__Mastermind 34270 points

    You can just clear the POWERDOWN bit over the SPI bus. The SPI functions remain active even during POWERDOWN state, and register values are still retained (and can be modified) during the POWERDOWN state. Some triggered actions like PLL calibration, SYSREF pulser output, or dynamic digital delay triggers are not initiated when the triggering register is written during POWERDOWN state. The RESET trigger can still be initiated in POWERDOWN state, which also clears the POWERDOWN condition.

    POWERDOWN state also disables the PLLs. If you have outputs that need to be aligned, or input-to-output phase relationships in zero-delay mode that need to be preserved, note that exiting the POWERDOWN state is functionally equivalent to randomizing those phase alignments just like you would normally see after a POR sequence, and you would want to re-synchronize the device following whatever sync procedure you typically follow after POR.

  • 0 in reply to Derek Payne
    Prodigy 20 points

    Ok. Thank you Derek.