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Clock Divider setting of 8 produces sub-harmonic spurious tones

Part Number: LMK04832

Tool/software:

LMK04832_200.tcs

Hi,

i have design that has the VCO2 at 3200MHz

Clock divider set to 16 produces clean clock at 200MHz

set to 4 produces clean clock at 800MHz

but when set to 8 produces several sub-harmonics and mixing products.

attaching the .tcs design file. this more or less describes the set up. both the loops are locked in all three cases.

what could be wrong? need help.

regards,

joseph

  • Hi Joseph, 
    We will follow up tomorrow. 

    Regards, 

    Vicente 

  • Hi Joseph, 

    I was able to get into lab and attempt to replicate your issue, but it was to no avail. However, I wanted to ask for a couple of details about your setup and configuration to see if that might lead me to your issue. 

    1) Can you send me a screen capture that features the sub-harmonics and mixing products?

    2) Are you driving all of these outputs simultaneously?

    Thanks,

    Michael

  • Hi,

    found the reason. somewhat un-expected! an output next (shares output driver VCC) to the output where measurements were taken, was not connected/terminated during the bench test. looks like the reflections on this couples through probably the shared VCC and the length of the reflected path somewhat makes the problem worse at 400MHz (wrt the 200 or 800 MHz)

    does this sound plausible? anyway attaching the spectrum of the unterminated case and the terminated case

    regards,

    joseph

  • Hi Joseph,

    This is the cause that I was expecting for this behavior. The proximity of the outputs (not to mention being driven with the same output driver) can result in crosstalk, where the signals leak into other traces and paths. Thanks for sending the screen capture. 

    - Michael