Tool/software:
Hi,
i have design that has the VCO2 at 3200MHz
Clock divider set to 16 produces clean clock at 200MHz
set to 4 produces clean clock at 800MHz
but when set to 8 produces several sub-harmonics and mixing products.
attaching the .tcs design file. this more or less describes the set up. both the loops are locked in all three cases.
what could be wrong? need help.
regards,
joseph