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LMK1D1204: input and output standards

Part Number: LMK1D1204

Tool/software:

Hi,

I want to replace an existing clockbuffer with LMK1D1204RGTR.

1) The input of the LMK is from an oscillator SG3225VAN100.000000M-KEGA3 whose input is set to same 2.5V as the buffer.

The oscillator requires a 100ohm resistor at the output between p/n and specifies VoD 250mV to 450mV.

Is this ok for the LMK buffer?

The input differential swing for LMK is not listed. Can you share that and help to clarify how it matches against the below osc spec?

2) In this scenario, is any biasing required with VAC_REF0 pin or need to keep it NC? Pls share how to implement?

3) Output of the buffer feeds to FPGA whose LVDS spec is as below. In this case, should we use AC coupling or DC coupling at the buffer outputs while connecting to the FPGA?

What cap values would you recommend? Any 100-ohm termination needed at the buffer output?

Thanks