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LMK04826: Synchronizing problems of two ADS52j90

Manuel Broennimann
Prodigy 50 points
Part Number: LMK04826
Other Parts Discussed in Thread: ADS52J90,

Tool/software:

I have trouble to snychronize two ADS52j90 with the LMK04826. I have 10 % of the startups a data mismatch by one clock cycle. Now I tried to startup the lmk as described in chapter "9.3.2.1.1 Setup of SYSREF Example" and "9.5.1 Recommended Programming Sequence".

In the chapter 9.5.1 there is the point "6. Program registers 0x166 to 0x1FFF" I don't understand.
Why is there a 16 Bit number instead of 8 Bit like the register size?
Do I have to do it even when I'm not using the PLL2?
And does it has to be the last command in the programming sequence?

  • 0
    TI__Expert 3460 points

    Hi Manuel,

    I will get to you tomorrow.

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    TI__Expert 3460 points

    Hi Manuel,

    Sorry for the delay, I have been out of office this week. The register addresses are actually 16 bits - rather than being 0x166, the address for that register is 0x0166. The registers to which that line refers all pertain to PLL2, which should be programmed after the VCO is programmed (so programming it last in the sequence would make sense). You do not have to program these registers when you are not using PLL2, but I am a bit confused why you would be doing that. The only time you would only use one PLL is in single-loop mode, which uses PLL2 as the single PLL. Could you share your configuration file for your LMK04826? Along with a system schematic?

    Thanks,

    Michael