LMX2595: LMX2595 Phase adjust and Manual RAMP

Hi There,

Instead of making a big phase change (e.g 45deg, 90deg) in one programming, I suggest make multiple small phase change.

For example, set the phase change to 5deg, then program MASH_SEED 9 times to get 45deg phase change.

Phase adjustment does not work with big phase change.

PLL_DEN should not be very big, otherwise it will take very very long time for the device to respond. 

Phase adjustment is accumulative, but not an absolute value.

I don't understand the ramp question. Is the abnormal ramp only happened once? Only happen the first time you enable ramp after Vcc power and programming? 

hello
Do I need to do a delay for continuous phase writing? What is the minimum time required? When writing a small Angle, I found that the Angle I actually appeared was much smaller than the Angle I set. For example, I set a phase of 10°, but the time felt only changed by two or three degrees. My test method is that both 2595 channels output the same frequency, record the original phase difference and then test the difference after writing down the phase.

After the ramp mode is powered on, incorrect waveforms will always appear. When exiting and re-entering the waveform, there is a small probability that it will become normal until I exit ramp quickly and restart it (within 1s). Once the waveform is normal, the waveforms of starting and exiting RAMP mode will be normal. When I enter the RAMP mode, I will write PLL_NUM ,PLL_DEN ,RAMP0, RAMP1 and R0 to 0xA41C
Exiting RAMP will write all registers related to the setting frequency, and R0 will write 0x241C

The following is my test process: Power-on -> RAMP -> Error waveform -> Exit RAMP -> RAMP -> Error waveform ->.... -> Error waveform -> Exit RAMP -> 1S Enter RAMP -> Normal waveform -> Exit RAMP -> Enter RAMP -> Normal waveform....

Hi there,

something like this? or can you try below sequence?

Power on --> program all register to lock to the start ramp frequency --> program RAMP_EN = 1 --> provide 138 RampClk clocks to ramp up --> program RAMP_EN = 0 --> wait?--> program RAMP_EN = 1 --> provide 139 RampClk clocks to ramp up --> ........

Yes, it is currently driven in this way. Power on -> Set center frequency ->69 ramp up ->1 ramp down ->138 ramp up ->1 ramp down ->138 ramp up.... At 10GHz, if I give 138 ramp up waveforms first, it is normal, but if I change to 9.999MHz, it is still wrong to give 138 ramp up waveforms first. Also, when SYNC is equal to 1, when I CHDIV>2, can I not make the phase difference of the two ways 2595 any value from 0.00 to 360.00?

Hi There,

I tried 9.9999GHz with Div/4, I am able to do manual or automatic ramp every time after doing a Vcc power up and programming. 

When SYNC = 1, there are two issues.

IncludedDivide maybe greater than 1. In this case, you may need to reduce fpd in order to meet min. N divider requirement. This is fine as long as you adjust CAL_CLK_DIV accordingly so that the state machine clock is equal to or less than fpd.

Another issue, this could be the main reason of failure. If the ramp range requires a VCO calibration, then ramping will not work properly. Ramping will work in general but at some point, it will stop ramping. If we continue to toggle RampClk, at some point, it will continue to ramp. 

I checked MUXoutPin that the locking situation was the same in both cases，the driving waveform is the same, what else can affect ramp？

and my app does not modulate RAMP with SYNC = 1.

The top of the video is the MUXout Pin and the bottom is the RAMP modulation waveform

Will RAMP improve if I use Full assist ？

Hi there,

To debug, suggest you do the ramp manually or ramp at a very slow speed. 

Are there any other limitations to the RAMP_LIMIT_LOW and RAMP_LIMIT_HIGH Settings? When my center frequency is set to 10G and the maximum RAMP bit is 10000.1mhz and the minimum RAMP bit is 9999.9mhz, there is no waveform output in RAMP when RAMP_LIMIT_LOW = 9999.9 RAMP_LIMIT_HIGH = 10000.1

HI 

Can I set it to 15G-7.5G? The 20G~10M I set with TICSPRO at the beginning can be written normally, but now TICSPRO limits me to set only 12560M~7440M. My FPD is 10M. If the center frequency is programmable (10M~20G)，and the maximum range of my RAMP is ±20MHz, what range should I set?

By the way, what effect does MASH_ORDER have on my output? I found no instructions for the MASH_ORDER setup in the manual

hello
Can you help me see what is wrong with the configuration of my TICS pro? When I RESET the reset bit, the first manual RAMP waveform must be wrong. I do not know where the configuration is incorrect.

Driving wave.csv

This is my driving wave

RAMP_MANUAL.rar

This is my TICS Pro engineering file

Hi there,

I don't know why, I will try.

What is the start and stop frequency?

What is the RampClk frequency?

How did you return the end frequency to the start frequency?

HI

the start frequency is 9999M and the stop frequency is 10001M

the RampClk frequency you can see the  Driving wave.csv，It's about 80K

I return to the starting frequency by pulling DIR up and giving a pulse

the D0 is DIR and the D1 is CLK

the RAMP0_INE  set to 0.01Mand RAMP1_INE set to 1M

max set to 0.05M and 5M

Hello,

The team is out for the holidays. Please expect a response by Jan 2 at the earliest.

Thanks,

Kadeem

hello，
Is there any progress?

Hi There,

Looks like this issue is related to the state machine clock frequency.

Can you try set CAL_CLK_DIV = 0x1 and PLL_R_PRE = 2. With this configuration, both state machine clock frequency and fpd will be 50MHz.

hello

I tried it as you suggested, and it didn't improve.

Hi There,

Then I don't know what was happening because I cannot replicate the problem.