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LMK03328: Initialization time

Part Number: LMK03328

Tool/software:

Dear Mr/Mrs,

I am targeting an LMK03328, assuming "hard pin mode".

I have following questions:

1) Upon low-to-high of pin PDN, the selected ROM page will be loaded. (See a.o figure 10-9 in datasheet).

How much time does "Configure all device settings" take when initializing from ROM?

2) What timings should be respected when pulsing PDN to reset the device?

3) I am planning to select a ROM configuration, and apply necessary delta via I2C. Followed by a software reset (R12.7).
If i change the "input buffer configuration" (see Table 8-3) via I2C, is there any risk for damage in the time between power-up with the ROM setting and the I2C setting taking effect? Or is this to be checked on a case by case basis?

Thank you very much for your support.

  • Sciocp,

    1. This will be part of the 10ms total ramp timing from the power supply ramping to locking with outputs (assuming that the loaded ROM page supports the input clock provided). In this case, the timing is from the PDN pin going high to the output clocks being provided. The time for this specific step is <<1ms.
    2. The memory loading is triggered by the de-assertion of the PDN pin. We do not have a minimum timing specification for holding PDN low before pulling high again - 100us should be sufficient.
    3. If using a differential input clock, there should not be an issue for any of the input buffer settings. For LVCMOS inputs, so long as the voltage does not exceed VDDIN (for PRIREF, max 2.6V for SECREF) there should not be an issue.

    Thanks,

    Kadeem