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LMX2820: Unlock at certain frequencies

Part Number: LMX2820

Tool/software:

I am seeing the LMX2820 unlock at some frequencies when performing a random tuning test. We know there is a problem with the doubler in autocal so at the moment we stick with frequencies that don't need the doubler to troubleshoot the unlock issue. We find that at some frequencies,(~5600MHz, ~6800MHz) typically with N in the range of 13.75 to 16.75, unlock can occur.

When the previous N is 18.75 and in a locked state, N is then set to 16.75, and R0 is written, the unlock can be observed quite frequently. (On another board this happens when N is changed from 18.75 to 13.75)

When this happens, the Vtune is scoped and observed to be oscillating with an almost sinusoidal wave centered around a Vtune of 1.8V with an amplitude of around 0.35Vp-p and a frequency of 2 - 3 MHz. The resultant output is an FM signal centered at 6.735GHz. Ref is around 298.5MHz and R divider is 1. MASH order 1.

When R0 is written a second time without writing to the other registers, it is then able to lock. Vtune then settles to a steady 1.36Vdc and the output is a clean 6.792GHz.

What could be the problem? Why does it tend to get stuck in an oscillatory state and requires a 2nd writing of R0 to get the Vtune out of the oscillation?

What can I do to prevent this unlock from happening?

Loop filter is stable with 75 degree of phase margin.

Thank you.

  • Hi Saxon,

    There is a min. N divider requirement for every PLL, in LMX2820, below is the requirement. Your problem is likely due to violation to this requirement.

  • Hi Noel,

    Apologies, the N stated in my original post are all in hexadecimal value, so they translate to a decimal value of 19.75 to 22.75. So they should be above the minimum N for VCO1 and VCO2 respectively for the first order MASH.

  • Hi Saxon,

    with fpd = 289.5MHz, N=19.75 or 22.75, I don't see any issue with 1st order MASH, at least I don't get any failure on my EVM.

    Did you set below registers properly?

  • Hi Noel,

    The R0 is programmed with 0x6670. So FCAL_HFFD_ADJ is 0x3 (fpd >200MHz).

    However, it seems that the VCO doubler cal is turned on also. Will this affect the lock when the doubler is not used?

    (Edit: It looks like there is no difference whether R0 is programmed with 0x6670 or 0x6630. I still get the Unlock which is probably an oscillating cycle slip that will only lock when R0 is programmed a 2nd time.)

    CAL_CLK_DIV is correctly set to 0x1. R2 is programmed with 0x92EE.

  • Hi Saxon,

    Since it has been taken offline, let's close this post.