CDCDB800: clock buffer

SHEKHA SHOUKATH

Intellectual 350 points

Part Number: CDCDB800

Tool/software:

Hi,

CDCDB800 clock buffer is used in my design, in order to route REFCLK from x16 MCIO connector to eight x2 lane SSD.

Please clarify the following doubts regarding the routing of the same:

REFCLK from x16 MCIO connector to clock buffer is routed in top layer, while 8 out clk signals from buffer to output connectors are routed in inner layer which is sandwiched between 2 ground planes.

Is it okay to route so?

Thanks and Regards,

Shekha Shoukath

3 months ago

0 vicente flores prado 3 months ago

TI__Mastermind 22861 points

Hi Shekha,
That should be okay - as long as impedance is matched and stack up is defined appropriately.
If customer has any worry they can always do SI test of their layout using our IBIS model as sanity check.

Best regards,

Vicente

Clock & timing

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CDCDB800: clock buffer