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LMK04828: How to set clock input

Nandhini Anandan
Prodigy 120 points

Part Number: LMK04828

Tool/software:

Hi,

In the LMK04828 part, three clock inputs (CLKIN0, CLKIN1, OSCIN) are used as inputs in EVAL design. Do we need to use all the three inputs to generate output?

Please find attached image from ADC EVM.

In the attached image, output is generated second pair of clock output, can we use from output 0?

Regards,

Nandhini A.

  • 0
    TI__Mastermind 32152 points

    Hello Nandhini,

    CLKinX are used as the reference clock for PLL1 which itself is designed to drive an external VCXO.

    OSCin is the reference clock for PLL2 meant for clock distribution.

    if you’re jitter cleaning (dual loop mode) then you need one CLKinX signal which drives an external VCXO whose in band phase noise will be lower and thus attenuate jitter with a narrow loop bandwidth.

    if you already have a very clean reference and don’t need to jitter cleaning you can get away by operating in single loop mode and having PLL2 only be utilized.

    dual loop mode is also utilized for frequency conversion when the reference clock and the internal VCOs don’t directly have a integer frequency relationship. 

    Best Regards,

    Vicente