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Tool/software:
Say in certain dB per frequency offset levels.
Let me know if this question makes sense.
Thanks,
Lauren
Can you provide a diagram with the relationship between the LMX2694-SEP, LMK04832, and VCXO elaborated? Without seeing the signal path, it's not clear at which point you're asking about the potential for phase noise degradation.
We eventually resolved this outside of E2E - in summary, enabling PLL2 does result in phase noise degradation relative to just the VCXO (since the additive noise of the PLL and internal VCO are applied); and I provided instructions to simulate their chosen topology in PLLatinum Sim.