Tool/software:
Hi,
I'm probably missing the obvious here but anyway...
I want to use REF0 for all three DPLLs. The status page shows DPLL 3 enters frequency and phase lock, but DPLL 2 and 3 won't lock probably since they don't detect REF0 as shown below. (assuming they're in order in the "Active Reference/Holdover" box). Since DPLL3 detects the 25MHz ref signal I'm assuming no problem with that. I thought I had all the same input boxes selected and configured for DPLL 1 and 2 as for DPLL 3 so not understanding why REF0 isn't validated for all three. Could you tell me which input boxes need to be selected and appropriate the configuration? Or what else I might be missing?
Thanks, Bret
