• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 22 subscribers
  • Views 621 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMX2572LP: LDO_DLY setting

Arun Hiregange
Prodigy 80 points

Part Number: LMX2572LP
Other Parts Discussed in Thread: LMX2595, LMX2572, LMX2594

Tool/software:

Hello,

I am looking to find the setting for LDO_DLY in register (R6) as per the datasheet for LMX2572LP.
There is a table 141 which has settings 1/2/3/5/8 based on the state machine clock frequency.

However, the default value for this field in register R6 is $19 i.e. 25. Even when I open TICSPro and look at this field, the default is $19 (25).

Please see attached screenshots from the datasheet and TICSPro.

So my question is, if I want to set LDO_DLY=5 based on table 141, what should I put into the LDO_DLY field in register R6?
Because it seems like there is no match from Table 141 to the default value in that register.

TICSPro also allows any value to be set even though Table 141 has only a few valid values.

Thanks,

Arun

  • 0
    TI__Guru** 121000 points

    Hi Arun,

    You need to set LDO_DLY only if you want to reduce the LDO settling time when you wake up the device from power down state. TICS Pro was not set up in this way. 

    If you need to reduce the settling time, you can configure this register according to the table shown in the datasheet.

  • 0 in reply to Noel Fung
    Prodigy 80 points

    Hello Noel,

    1) Thanks for the answer. LDO settling time is not a big factor for me, so can I leave at the default value of 25?

    In a previous project we had used LMX2595 and there the value of LDO_DLY from the table was 2, however I see now we had left LDO_DLY at the default value of 25. Looks like based on your input I can just do the same here as well. Please confirm.

    2) A followup question, with a LDO_DLY setting of 25, how much time would the LDO take to settle? I will add a wait for this time based on your reply. Programming sequence section 7.5.1.1 mentions to wait for 500usec for internal LDOs to become stable after wakeup from powerdown.

    Thanks!

    Arun

  • +1 in reply to Arun Hiregange
    TI__Guru** 121000 points

    Hi Arun,

    Yes, you can leave LDO_DLY = 25 in LMX2572. 

    In LMX2594, there is no LDO_DLY.

    The LDO_DLY setting is used to reduce the LDO settling time when we wake the chip up from power down state. That means, the chip was initially locked and working, then we power it down with the CE pin or POWERDOWN =1. Later, we wake the chip up, then the setting of LDO_DLY will affect the wake up time. This setting does not apply to the programming sequence section as this sequence is for the first programming after the device is Vcc power up.