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LMK5B33414: Interrupt function

Qiang Ren
Intellectual 1705 points
Part Number: LMK5B33414

Tool/software:

Hello team,

Currently my customer is using LMK5B33414 on their board. There is a test case that the input will be disconnected and the interrupt will be generated by device and report to the GPIO. 

In this case, when the input of the DPLL is invalid, the LOFL_DPLL and LOPL_DPLL interrupt is reported by register, GPIO is set to high as expected. And when we clear the interrupt(set the 0x31 INT_CLR to 1), the GPIO is still high and register is still reporting interrupt. 

This observation is expected in my understanding, since the input is still invalid when we clear the interrupt. And the LOFL_DPLL and LOPL_DPLL is triggered by event. Is there a method to configure these 2 interrupt to rising edge trigger? Like only when the DPLL input is change from the valid to invalid, the interrupt is reported to the GPIO and register? 

Thanks!

Regards,

Qiang

  • 0
    TI__Intellectual 2875 points

    Hi Qiang,

    GPIOx can be used to monitor LOFL and LOPL. Do you mean to just monitor the rising edge of LOFL or LOPL, and is cleared when INT_CLR is asserted?

    -Riley

  • 0 in reply to Riley Nguyen
    TI__Intellectual 1705 points

    Riley,

    Yes, I want to only monitor the rising edge of LOFL and LOPL, and can be cleared when INT_CLR is asserted. But please note that when we clear the INT_CLR, the DPLL input is still invalid. 

    Thanks,

    Qiang

  • 0 in reply to Qiang Ren
    TI__Intellectual 2875 points

    Hi Qiang,

    Understood. There is a INTR option on GPIO, but I would need to do some testing on this. I will get back on this.

    -Riley

  • 0 in reply to Riley Nguyen
    TI__Intellectual 2875 points

    Hi Qiang,

    You can configure any of combination of these bits for INTR flag on GPIOx.

    Any individual interrupt flag can be masked so the flag does not trigger the interrupt output.

    For example, if you only want to monitor when REF of DPLL3 is lost, mask all other bits except LOR_MISSCLK3_MASK.

    Select Interrupt (INTR) on GPIOx as below:

    The output of GPIOx will be the result of LOR_MISSCLK3_POL and LOR_MISSCLK3_INTR. So GPIOx flags when LOR of DPLL3 is detected and cleared with INT_CLR = 1.

    You can change to any other combination of INT bits for the desire application.

    Best,

    Riley