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LMK03806BEVAL: output frequency offset

Part Number: LMK03806BEVAL
Other Parts Discussed in Thread: LMK04806, LMK03806

Tool/software:

Hi,

Customer is evaluating EVM for from 12MHz~25MHz output clock.

In the TICS pro, it shows 25MHz and 12MHz but they are actually 5.2% higher than calculation in TICS pro.

With bypass, OSCout shows 25MHz so it's not reference input clock issue.

Could you check this issue?

Thanks.

  • David,

    Do you have a Hex Register Value export that you can provide here? In the meantime, see if importing these registers and then writing all registers works (may need to try with the LMK04806 GUI instead of the LMK03806 GUI, this is an issue I have run into in the past):

    R0 (INIT)	0x00020200
    R0	0x00000C80
    R1	0x00000CC1
    R2	0x00000D02
    R3	0x00001883
    R4	0x000018C4
    R5	0x00001905
    R6	0x04010006
    R7	0x01010007
    R8	0x01010008
    R9	0x55555549
    R10	0x9142400A
    R11	0x3401100B
    R12	0x138C006C
    R13	0x3B03826D
    R14	0x0300000E
    R15	0x8000800F
    R16	0xC1550410
    R24	0x00000018
    R25	0x02C9C419
    R26	0x8FA8001A
    R27	0x1800009B
    R28	0x0010001C
    R29	0x008000BD
    R30	0x0500029E
    R31	0x001F001F
    

    Thanks,

    Kadeem

  • Hi. Kadeem Samuel.

    LMK03806B GUI Register Value is as follows. 

    And if I write each Register one by one, it generates a frequency that is about 5% higher.


    R0 (INIT)	0x80020140
    R0	0x00000C80
    R1	0x00000CC1
    R2	0x00000D02
    R3	0x00001883
    R4	0x000018C4
    R5	0x00001905
    R6	0x01010006
    R7	0x01010007
    R8	0x01010008
    R9	0x55555549
    R10	0x9142400A
    R11	0x3401100B
    R12	0x130C006C
    R13	0x3B03826D
    R14	0x0300000E
    R16	0xC1550410
    R24	0x00000018
    R26	0xAFA8001A
    R28	0x0020001C
    R29	0x008000BD
    R30	0x0400033E
    R31	0x001F001F


    When applying LMK04806 GUI using Register Value sent by Kadeem Samuel, Clock is not output properly.

    Thank you.
  • JinBae,

    I will test this on the bench, and should have a configuration by tomorrow.

    Thanks,

    Kadeem

  • JinBae,

    My apologies for the delay, but I will need an additional day for this.

    Thanks,

    Kadeem

  • I'll wait for your reply. Thank you.
  • JinBae,

    I believe that the value lies in the field PLL_N_CAL - this field is not updated automatically, and needs to match the value of the N divider. 

    When I update this field, then toggle RESET high then low, then write all registers, I get the correct frequency output.

    R0 (INIT)	0x80020140
    R0	0x00000C80
    R1	0x00000CC1
    R2	0x00000D02
    R3	0x00001883
    R4	0x000018C4
    R5	0x00001905
    R6	0x04010006
    R7	0x01010007
    R8	0x01010008
    R9	0x55555549
    R10	0x9142400A
    R11	0x3401100B
    R12	0x138C006C
    R13	0x3B03826D
    R14	0x0300000E
    R16	0xC1550410
    R24	0x00000018
    R26	0x8FA8001A
    R28	0x0010001C
    R29	0x0080029D
    R30	0x0500029E
    R31	0x001F001F
    

    Thanks,

    Kadeem

  • Hi. Kadeem Samuel.

    The correct operation was verified in the following order.

    1. Reset High then Low.

    2. PLL Group Register Write Operation Excute. (R24~R31)

    3. Other Control Register Write Operation Excute. (R0~R14)

    Thank you for your help.

    Have a good day.