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CDCM61002 - LVCMOS output drives LVTTL

Other Parts Discussed in Thread: CDCM61002, TLK2501

Hello,

I would like to use a LVCMOS output of the CDCM61002 to drive directly the LVTTL input of the TLK2501. I have checked a current efficiency of both chips and I haven't spotted any obstacles. The 3.3V driving 2.5 input shouldn't be an issue as well. Has anybody tried to use that configuration ?  May I connect those ports directly without sacrificing a jitter performance of the CDCM61002 LVCMOS port (Total period jitter ~28 ps) ? Thank you in advance.

  • Hello Adrian,

    Please first allow me to appologize. We must have overlooked your message and just now saw that it wasn't responded to yet.

    Concerning your question, yes, connecting the 3.3V LVCMOS output directly to this 2.5V LVTTL input presents no problem as the TLK2501 was designed in particular to provision for such a use case. One thing to consider: the duty cycle will be slighly different if you have a 1.25V signal threshold on the GTX input but drive it with a 3.3V signal. To avoid this, one alternative would be a voltage divider on the receive end. However, I think it's easier and just as reliable to use it without the divider.

     

    Also, the GTX clock needs to be phase aligned with the input data. If you drive the CDCM61002 clock directly into the TLK2501, how do you get the data to be phase aligned? 

    General note on LVTTL vs CMOS: LVTTL and LVCMOS can be treated the same for all practical matters. The main difference are the thresholds for logic levels, load conditions, rise time, etc, but I think the origin for these different specs comes from the actual buffer implementation based on using CMOS vs. BiPolar technologies. Ultimately, you want to be sure that the CMOS output can drive sufficient signal swing and meets the rise time for the LVTTL input.

     

    I will ask my coworker supporting TLK2501 to overlook this post as well.

     

    Best regards. Falk Alicke