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LMK1D2108: debugging dead clk buffer outputs

Aditya Shukla
Prodigy 10 points
Part Number: LMK1D2108


Tool/software:

I just designed and put together a PCB with the schematic attached in pdf. It is driven by by microchip's DSC1103CI2-200.0000 (200MHz), and powered by TI's TPS70933DBVR.

I was hoping the the circuit would work in one shot (so naive of me).

The problem is I see nothing at the SMA output pads, with or without 50 ohm termination. (With 50 ohm termination, I just connect a 100 ohm between P and N clk outputs and connect signals to an oscilloscope (Zin=1Mohm) via BNC.)

My observations:

(0) I see absolutely no oscillations at the buffer's outputs, even the noise has no components close to 200MHz

(1) The DC components of the clk outputs seems random. For some pairs, one pad is at DC 0.8V (P), other at DC 1.8V (N), other pads are pinned at 0.9V (both P and N).

(2) The whole chip draws about 20-30mA (datasheet says ~50-100mA)

(3) Microchip's oscillator LVDS output outputs a correct sine-wave, about 0.5 V pk-pk for clk-P. So the input is working fine

Is the chip dead? Am I not terminating the clk outputs properly? Is the EN pin not supposed to be at 3.3V (inverted logic)?

Here's the 3d model of the PCB for a quick review, if that helps. It took me an hour to design, so I feel safe to attach it here.

oscillator_schem.pdf

  • 0
    TI__Mastermind 29412 points

    Hello Aditya, 
    All VDD pins should be connected even if unused. 

    If set to 1, only BANK0 outptus are EN. 

    In this case I would expect OUT0 to OUT7 to be active which you do have routed. 
    Does your differential receiver have a built in 100Ohm differential termination? 

    Given AMP_SEL if float in your case the outputs should have standard LVDS swing (350mV)

    Best regards, 

    Vicente 

  • 0 in reply to vicente flores prado
    Prodigy 10 points

    Thanks for replying, Vicente.

    I haven't attached the receiver yet, as the I cannot detect the chip's output on the oscilloscope.

    Here is the setup I used for testing:

    The oscilloscope shows nothing, just some DC/steady voltages in the range 0.0-1.8V

  • 0 in reply to Aditya Shukla
    TI__Genius 9460 points

    Hi Aditya, 

    We will get back to you on Monday.

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    TI__Mastermind 29412 points

    Hello Aditya, 
    What are the properties of the driver? 
    Can you share the clock input specs? 

    Is the input being biased accordingly? In your schematic I see you're using VAC_REF - this should bias your input pins to 1.25V

    Best regards, 

    Vicente 

  • 0 in reply to vicente flores prado
    Prodigy 10 points

    Vicente,

    I am using DSC1103CI2-200.0000, a 200MHz MEMS clock generator with LVDS output. Here is the datasheet: link

    I measured the input bias voltage with a multi-meter, and it was indeed around 1.2V.

  • 0 in reply to Aditya Shukla
    TI__Genius 9460 points

    Hi Aditya,

    I have looked over this a bit, and I am a bit confused. The datasheet for the clock gen states that the output swing is 350 mVpp, and its output rise time is 200 ps. You mentioned that it is a sine wave with a 500 mVpp amplitude. Could you clarify what your clock gen is outputting?

    Either way, I am curious as to whether or not the input swing/slew rate could be the source of your issues. Do you have any signal generators on hand? Would you be able to input a signal with a higher swing (i.e. 750 mV)? If not, I will take this into lab tomorrow and see if I can replicate the issue with the output specs you provide.

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    TI__Mastermind 29412 points

    Hello Aditya, 
    The slew rate matches what I would expect from an LVDS XO and the swing does also. 
    If your output is already LVDS - I wouldn't expect the AC coupling and having to use AC ref though given the XO output will be biased. 

    If you probe the input pins with a High-Z scope - do you see the LVDS XO output? If you don't - do you see an output across the 50Ohm resistors at the Outputs of the XO? 

    As Michael mentioned I am a bit confused, the swing should be ~350mV typical SE for an LVDS signal. 
    I wouldn't expect to see a Sine Wave even at 200MHz with an LVDS XO. 

    Best regards, 

    Vicente