LMK04832: TICSPRO Configuration file for Buffer

Arijeet Saha

Part Number: LMK04832

Tool/software:

Hi TI Team,

I am using LMK04832NKDT for one of my ongoing designs as a clock buffer for faning out the incoming clock to 12 slave devices.

An LVDS input clock of 13MHz shall be provided as input to CLKIN0, CLKIN0# pins.
Kindly help me generate the TICSPRO file for the below schematics.

5 months ago

0 vicente flores prado 5 months ago

TI__Mastermind 28982 points

Hello Arijeet,
Please adjust the status pins accordingly.
I see you routed LEDs but I don't' know what signal you want to output.
The config is set for distribution (buffer) mode for a 13MHz input signal to Fin.

Best regards,

Vicente
13MHz LVDS Distribution Mode.tcs

0 Arijeet Saha 5 months ago in reply to vicente flores prado

Prodigy 120 points

Hi,

I updated the CLKIN freq to 13.312MHz.& generated this .tcs file. Can you please verify once.

13.312MHz LVDS Distribution Mode.tcs

Regarding LEDs we are not using them as such now

0 Michael Srinivasan 5 months ago in reply to Arijeet Saha

TI__Expert 8500 points

Hi Arijeet,

I took a look over your config and it looks good. It should output 12 13.312 MHz signals. Make sure you trigger a SYNC event in order to align the outputs.

Thanks,

Michael

0 Arijeet Saha 5 months ago in reply to Michael Srinivasan

Prodigy 120 points

Hi,
Sure Thanks

But if i try to sync in between, all my clocks will go low for some duration rite..ie i won't be getting any clocks in between.

any specific pulse width requirement for sync?

0 vicente flores prado 5 months ago in reply to Arijeet Saha

TI__Mastermind 28982 points

Hello Arijeet,
We don't have an official spec per say.
5ns +1 clock distribution period should be fine.

Best regards,

Vicente

0 Arijeet Saha 5 months ago in reply to vicente flores prado

Prodigy 120 points

Hi..

To my present logic, we are not using sync to what I came to know from my software team. They are just flashing the lmk config file (buffer mode).
If I probe, the clocks all appear to be in sync.

Do we need to provide a separate sync pulse post-power on?
In our application, we cannot provide a sync pulse in between when the system is running as that will lead to loosing data for us.

0 Michael Srinivasan 5 months ago in reply to Arijeet Saha

TI__Expert 8500 points

Hi Arijeet,

We will get to you tomorrow.

Thanks,

Michael

+1 vicente flores prado 4 months ago in reply to Michael Srinivasan

TI__Mastermind 28982 points

Hello Arjeet,
I can see that the outputs could potentially end up aligned in distribution mode in the case all outputs are just in div by 1.

But yes, you still need to provide a sync to reset the dividers in case the outputs are not aligned.

Best regards,

Vicente

0 Arijeet Saha 4 months ago in reply to vicente flores prado

Prodigy 120 points

Thanks,
I will update my SW development team on this.

Clock & timing

Clock & timing forum

LMK04832: TICSPRO Configuration file for Buffer