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Original question:

LMK05028: LMK05028 power supply requirement

LMK05028: VDDOx supplies and how that impacts output clock electrical characteristics

Shivani Shah
Prodigy 85 points
Part Number: LMK05028
Other Parts Discussed in Thread: LMK05318B, LMK5B12204

Tool/software:

I am looking to use the LMK05028. 3 outputs will be using the LVCMOS clocks and one will use the LVDS output clock. We will also be driving the PLL with 2 LVCMOS clocks and 1 LVDS clock.

For the LVDS connections, does the VDDOx impact the electrical characteristics of the LVDS signal? I want to connect the following 2 components. I want to make sure I understand the Vpp and Vcm of the LVDS signals. I am supplying the VDDOx pin with 3.3V but would not like the Vpp to be that high.

Similarly, I am supplying the LVCMOS pins with 3.3V. My understanding is the internal LDO will for the output to 1.8V logic level. Can the LDO handle having a 3.3V input for all my LVCMOS channels?

  • 0
    TI__Genius 16925 points

    Hi Shivani,

    1. For the AC-LVDS, AC-CML, AC-LVPECL, and HCSL outputs, the VDDO output supply voltage does not impact the swing level. As long as the VDDOx supply requirements are met per datasheet specification, then the swing levels will be within the min and max range you see in the datasheet.
    2. For LVCMOS outputs, the VDDO output supply does matter. 3.3V can still be applied to VDDO but the LVCMOS swing will not reach 3.3V due to the internal LVCMOS LDO dropout voltage as the datasheet mentions. It is recommended to apply either a 1.8V or 2.5V supply to the LVCMOS output VDDO pin.
    3. Can you clarify if the AFBR-5972EZ is the input to the LMK05318B or the output of the LMK05318B going to the AFBR-5972EZ?
    4. I would like to also add that we have newer parts that have improved performance. The LMK05318B (8 output) or LMK5B12204 (4 output) have better jitter performance as they contain the BAW VCO for ultra low jitter outputs. Please note that the LVCMOS output levels are 1.8V for these devices.

    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 85 points

    For  #2 Why is 1.8V or 2.5V recommended? I only have a 3.3V supply and don't want to add another one to the design if it is not necessary

    AFBR-5972EZ is both connected to an AC LVDS input and and AC LVDS output. We won't be using both connections at the same time but we are leaving flexibility on this circuit

  • +1 in reply to Shivani Shah
    TI__Genius 16925 points

    Hi Shivani,

    1. Let me elaborate why 1.8V or 2.5V is recommended. In this example, OUT6 is configured as LVCMOS.
      1. If VDDO_6 = 1.8V, then we can expect the OUT6 swing level to be around 1.8V. The min and max VOH/VOL values are also characterized over temperature, voltage, and process variation in the datasheet.
      2. Similarly, if VDDO_6 = 2.5V, then we can expect the OUT6 swing level to be around 2.5V. The min and max VOH/VOL values are also characterized over temperature, voltage, and process variation in the datasheet.
      3. If VDDO_6 = 3.3V, then we cannot expect the OUT6 swing level to be close to 3.3V. It may be fluctuate around 3V or 2.5V, for example, due to the LDO dropout voltage. The swing level when VDDO_x=3.3V is not characterized in the datasheet.
      4. If your LVCMOS receiver expects a 3.3V LVCMOS input, then the LMK05028 cannot meet the requirements. However, if the LVCMOS receiver can expect a voltage range, such as between 1.8V and 3.3V or around the 2.5V spec, then it is OK to set VDDO=3.3V.
      5. What are the VIH/VIL requirements of your LVCMOS receiver?
    2. Understood on the connection from the AFBR-5972EZ, thank you for clarifying.

    Regards,

    Jennifer