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LMK1D1208EVM: Additive phase noise

user5200299
Prodigy 100 points

Part Number: LMK1D1208EVM

Tool/software:

Hi, we are evaluating the LMK1D1208EVM board, and we're experiencing some odd results, regarding the additive phase noise. in our configuration, we've added an TPS7A8900 before the LMK1D1208EVM, in order to filter the Power supply. 

The clock source is in LVPECL format @100MHz, with the phase noise analysis : 

in the other hand, all the outputs are loaded with 100Ohm differential load. 

here is the phase noise analysis : 

.

our concern is the two following points : 

1) with the power supply filtered, and with the input as indicated above, the noise floor level is around -150dB where the datasheet indicated -164dB. 

2) The additive phase noise is specified to ~60fs in specification, but in our case we can see an additive phase noise on ~200fs.  

how can we explain these results ? 

regards,

 Yohann 

  • 0
    TI__Mastermind 32152 points

    Hello Yohann, 
    What is the refernce clock you're using as input to the EVM? 
    Do you have a phase noise plot of the reference? 

    Best regards, 

    Vicente 

  • 0
    TI__Genius 17001 points

    Hi Yohann,

    This does look like too much noise. I am a bit confused what you mean when you say you added the TPS7A8900 before the LMK1D1208EVM. Did you place it on the power rail before it connects to the EVM?

    Additionally, what are you using as your power supply? You should not need the TPS7A8900 to filter the the power supply unless its source is noisy. Can you disconnect the TPS7A8900 and see what the phase noise reading looks like then? I will be able to go into lab and replicate this setup tomorrow.

    Thanks,

    Michael

  • 0 in reply to vicente flores prado
    Prodigy 100 points

    Hi, 

    The clock source provided to the clock buffer is the first picture. 

    regards. 

  • 0 in reply to Michael Srinivasan
    Prodigy 100 points

    Hi, 

    The phase noise is not too much, but its way higher than the values advertised. the same apply to the noise floor level. 

    In the other hand, it'll be integrated with a tps7a8900, that source from a 4.0V Rail, so we wanted to reproduce the future implemented solution. But the power supply source is not noisy, and the presence of the LDO does not impact the phase noise output level.    

    do you have an explanation about  theses results  ?

    Regards, 

    Yohann 

  • 0 in reply to user5200299
    TI__Genius 17001 points

    Hi Yohann,

    Can you send me a picture of your setup? I am just trying to make sure I understand this correctly: you are using the LMK1D1208EVM with an LDO between your power supply and your supply rail on the EVM board. You are inputting a 100 MHz LVPECL signal. 

    Please note that this device has universal inputs, but you need to terminate the LVPECL input as shown below:

    Furthermore, the board inputs are configured as below:

    Could you try the input with a single-ended signal on INx_P and tie INx_N to GND?

    Thanks,

    Michael