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LMK04828: What is "CRYSTAL OSCILLATOR MODE SPECIFICATIONS"

Part Number: LMK04828
Other Parts Discussed in Thread: CLOCKDESIGNTOOL

Tool/software:

What does "CRYSTAL OSCILLATOR MODE SPECIFICATIONS" mean in the Electrical Characteristics table of the LMK04828 datasheet?
What does the Crystal frequency range refer to?

  • Odajima-san,

    The LMK04828 device can be used in single-loop, dual-loop, or distribution mode. If you were to use dual loop mode (for the sake of jitter cleaning), the first loop would require an external VCXO as the local oscillator. See the attached image below

    The specifications refer to the acceptable operating frequency of the VCXO, as well as its input capacitance. Violating these values could result in unexpected operation.

    Thanks,

    Michael

  • Dear Mr.Michael,

    Thank you for your response.
    The LMK04828's crystal frequency range is stated to be 10-40 MHz, yet the board I designed uses a 100 MHz VCXO.

    While the PLL functions correctly, this is considered a non-recommended usage, right?
    Is it possible for it to function correctly at 100 MHz as well?

    Additionally, do design tools like PLLATINUM or ClockDesignTool provide a warning when a VCXO outside the recommended range is used?
    Thanks,

    Kazuto Odajima

  • Hello Odajima-san, 
    Please note an XTAL is not the same as an XO. 
    XTALs require drivers to oscillator. An XO or Xtal-Oscillator has the driver imbedded internally. You also don't need external capacitors like the Xtal requires. 
    LMK04828 input has this driver available if needed (it's an amplifier actually) but it's limited to 10MHz to 40MHz range. 
    Now a VCXO does not require a driver. It's actually operates on feedback. Usually driven by PLL1 of LMK04828 to jitter clean or even frequency conversion, you would have a 10MHz input clock which will go through a PLL and the charge pump output goes through a loop filter which is essentially a low pass filter that converts current to voltage. This voltage is what connects to the Vtune or tuning voltage pin of the VCXO which gets fed to OSCIN to drive PLL2 for clock distribution. There is also feedback from the OSCIN to the PLL1 N divider internally to complete the feedback loop. 

    The maximum input clock frequency is actually 750MHz or even 3.1GHz if operating in distribution mode (buffer mode) or with an external VCO (you can bypass the internal VCOs if you'd like). 

    So no the input is not limited to 40MHz - that's only the case if the input is a XTAL. 

    Best regards, 

    Vicente