This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK05318B-Q1: PLL with 1PPS synchronization capability

Part Number: LMK05318B-Q1

Tool/software:

Dear Team,

We are looking for the Phase-Locked Loop (PLL) solution for a system requiring synchronization to an external 1PPS signal and the generation of a corresponding 1PPS output.

The following specifications are mandatory:

1) Operating Temperature: The PLL must maintain operational integrity across an ambient temperature range of -40°C to +105°C.

2) Configuration Methodology: Configuration of the PLL shall be achieved exclusively through hardware pin modes. The use of external SPI/I2C interfaces or on-chip EEPROM is prohibited.

Regards,

Esakki.

  • Hi Esakki,

    We do not have preprogrammed parts for 1PPS in and 1PPS out.

    Can you please elaborate why on-chip EEPROM is prohibited? Many of our customers work with third-party contract manufacturers to pre-program the EEPROM of devices such as the LMK05318B-Q1. Is pre-programming with a third-party a feasible solution for you?

    Regards,

    Jennifer

  • Hi Jennifer,

    We are designing a system utilizing the LMK05318B-Q1 PLL chip. Our intent is to program the on-chip EEPROM once in a lab environment using an external host programmer. Following this initial programming, we require the PLL to operate autonomously, loading all configuration settings solely from its internal EEPROM upon each power-on, without requiring any further external communication or reprogramming.

    We would like to confirm that the LMK05318B-Q1 is fully capable of supporting this operational mode. Specifically, can we reliably expect the chip to:

    • Automatically load entire configuration data from the EEPROM at power-up?
    • Operate completely independently after the initial EEPROM programming?

    We have reviewed the datasheet and believe the LMK05318B-Q1 is suitable, but seek confirmation that this single-programming approach aligns with the chip's intended functionality.

    Regards,

    Esakki.

  • Hi Esakki,

    Thank you for clarifying.

    I confirm that the registers always load from EEPROM as shown in the start-up sequence in the datasheet:

    The load from EEPROM occurs automatically allowing for independent operation of the device for applications where in-system programming is not available.

    Regards,

    Jennifer

  • Hi Jennifer,

    Thanks for your confirmation.

    Regards,

    Esakki.

  • Hi Esakki,

    I am happy to help. If you have further questions, please create a new thread. I am closing this post.

    Regards,

    Jennifer