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CDCE6214: How to enter serial communication mode?

Part Number: CDCE6214

Tool/software:

So I'm reading: 

"By factory default, the page 0 EEPROM has pin mode enabled, meaning that the 4 GPIO pins are configured as individual OE pins.

R0[0] defines the pin mode, but this bit will only take effect when written to EEPROM"

 

If I want to select Serial Interface Mode (not fall back mode) at power on what voltage level do I set REFSEL and HW_SW_CTRL to?   (the table shows L/H probably due to the EEPROM page number, but I don’t see how to differentiate between pin mode and serial interface mode at power up)

I think I would need to program EEPROM's R0[0] but I'm confused. Thanks! 

  • Cameron,

    If you have a TI factory default device [as in the EEPROM as not been reprogrammed], then EEPROM Page 0 does not have I2C communication, but EEPROM Page 1 does. 

    EEPROM Page 0 is selected when HW_SW_CTRL is pulled Low at startup. EEPROM Page 1 is selected when HW_SW_CTRL is pulled High at startup. REFSEL can be pulled either High or Low but cannot be left floating. 

    If you plan on rewriting the EEPROM, I2C communication is enabled/disabled with R0[0] (which is EEPROM 16[0] and 40[0]) where 0 has I2C enabled.

    Best,

    Cris

  • At first glance this statement is confusing:  REFSEL can be pulled either High or Low but cannot be left floating. 

    The datasheet says this so seems to conflict, it says both can be left floating : 

     

     

    I am thinking of using fall back mode to ensure I2C works at boot, I don’t know if we will use the EEPROM or not.

    I could not find the default clock selection in fall back mode.  Will fall-back mode select the PRI or SEC clock input?   Or does that have to be selected over I2C after boot in that mode?

  • Cameron,

    To clarify, when selecting to load an EEPROM page, that's when REFSEL cannot be left floating and must be pulled High or Low.

    When entering fall-out mode, yes both REFSEL and HW_SW_CTRL should be floating.

    Fall-back mode is set to the following configuration. Keep in mind upon startup in fall-back mode, the part is not locked and the PLL must be calibrated by toggling the calibration bit.

    Best,

    Cris

  • You're awesome Cris, thank you!!

    In the top diagram, what is the mux select set to in fall back mode?  That diagram just shows how REFSEL selects the mux but if floating which path is selected?

    I see a 25MHz PLL freq range but it is not clear which clock input it is selecting by default.

  • Cameron,

    Sorry, SECREF is selected by default in fall-back mode.

    Best,

    Cris