CDCM6208: IIC Communication abnormality issue

Colin Chen

Part Number: CDCM6208

Tool/software:

Dear Experts

At present, the existing products are experiencing equipment failures in end customers. After investigation, we found that it is caused by abnormal IIC configuration of CDCM6208.

The specific reason is that CDCM6208 did not return ACK normally, resulting in MCU IIC bus hanging up, failure to complete CDCM6208 register configuration, abnormal clock output, and device function abnormalities; We have tried to modify the 4.7K Ω pull-up resistor to 1K Ω pull-up resistor, and the fault has been optimized.

We have compared the signal quality and timing of the two pull-up resistors, and both meet the requirements of the data manual. Currently, it is unclear the specific cause of the IIC fault. Does the chip have strict requirements for the rising edge slope or high-level cycle? What is the minimum IIC pull-up resistor that CDCM6208 can use?

4 months ago

0 Kadeem Samuel 4 months ago

TI__Mastermind 22820 points

Colin,

Can you provide captures of both the I2C transaction and the VDDs during device startup? Please see these threads:

Note that the evaluation module uses 2k pullup resistors to 3.3V.

Thanks,
Kadeem

0 Colin Chen 4 months ago in reply to Kadeem Samuel

Intellectual 855 points

Hi Kadeem,

1.The IIC test waveforms of two pull-up resistors are shown in the compressed packagetest waveform.zip

2.According to the requirements of the Slow Power Up Supply Ramp section in 10.1.3, the PDN is tested as shown in the following figure. It is only pulled up after the power on is completed, which meets the manual requirements.When the resistor is pulled up at 4.7k, even if the PDN is pulled up and delayed to 300ms, there will still be a situation where CDCM6208 does not return ACK.

3.We tested 1K and 2.2K pull-up resistors, both of which can reduce the probability of abnormalities, but cannot completely solve the problem.4.7K pull-up resistor, tested for signal quality and timing, meets manual requirements, theoretically 4.7K should not have such a high probability of abnormality

Please help analyze the cause of the malfunction. Thank you very much

0 Cris Kobierowski 4 months ago in reply to Colin Chen

TI__Expert 6325 points

Colin,

We are in discussion with our designer about this case.

In the meantime, can you provide the schematic and configuration of the device?

Best,

Cris

0 Colin Chen 4 months ago in reply to Cris Kobierowski

Intellectual 855 points

Hi Cris,

The schematic file is as follows:CDCM6208.pdf

The register configuration is as follows,We have corrected the PRI input clock level configuration in the current register configuration, turned off the automatic switching of the input clock, and the probability of anomalies has not decreased.

Please help with further analysis, thank you

0 Cris Kobierowski 4 months ago in reply to Colin Chen

TI__Expert 6325 points

Thank you.

We will continue to discuss with the designers and will try to recreate the issue on the bench. Please expect an update Tuesday.

Best,

Cris

0 Cris Kobierowski 4 months ago in reply to Cris Kobierowski

TI__Expert 6325 points

Hello,

Looking through the schematic we noticed U19, U29, and U30 share the same I2C line and pullup resistors as the CDCM6208. Can you explain to us what these units are?

Best,

Cris

0 Colin Chen 4 months ago in reply to Cris Kobierowski

Intellectual 855 points

Hi Cris,

U19 is an EEPROM,U29 and U30 are LM75

0 Cris Kobierowski 4 months ago in reply to Colin Chen

TI__Expert 6325 points

Colin,

Can you provide a scope capture of the I2C transaction at the CDCM6208 pins?

Also how far away are the pullup resistors [R1082 and R1083] from the CDCM6208?

Best,

Cris

0 Colin Chen 4 months ago in reply to Cris Kobierowski

Intellectual 855 points

Hi Cris,

1.The IIC test waveforms of two pull-up resistors are shown in the compressed package7823.test waveform.zip

2.The distance from the pull-up resistor to CDCM6208 is approximately 6100mil

0 Colin Chen 4 months ago in reply to Colin Chen

Intellectual 855 points

Hi Cris,

Has there been any update on this case? Thank you

0 Cris Kobierowski 3 months ago in reply to Colin Chen

TI__Expert 6325 points

Colin,

Apologies for the delay. Since this is an old part, our designers are having difficulty accessing the design files. This may take longer than expected. In the meantime, we are discussing the waveform images you sent us. Please give me an additional day.

Best,

Cris

0 Cris Kobierowski 3 months ago in reply to Cris Kobierowski

TI__Expert 6325 points

Colin,

After looking through the I2C waveforms you sent, I agree that everything shown is well within the spec of the device. Unfortunately, without being able to access the design files, there is only so much debug that can be done.

If there is any update on our side in the future I will let you know.

Best,

Cris

Clock & timing

Clock & timing forum

CDCM6208: IIC Communication abnormality issue