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LMK03318: LMK03318 application question

Part Number: LMK03318

Tool/software:

Hi Team

several question as below.

1.if OUT0~7 power source is VDDO_xx,where is STATUS0 ~ 1 power source? is it also VDDO?

2. could STATUS0/1 be configured as 125MHz output?

GUI only have OUT0~OUT7 setting,there is no STATUS0/1 setting.

Datasheet doesn't have 3.3V LVCMOS fig,only have level shift application 。if we need 3.3V LVCMOS feature. do it need level shift?

3.Datasheet mention HCSL need a external 50ohm to GND,If GUI setting is HCSL(int. 50R)/ is it still need 50ohm?

4.how to connect REFSEL? if follow EVM and use 50MHz crystal for LMK03318 input,could we follow below setting , REFSEL floating?

setting GUI as below. use SECREF 50MHz,Doubler 2x,PLL Ref  is SECREF

5.HW_SW_CTRL  pull-low 1K to GND is ok?

6.GPIO0 is pull-up 1K to 3.3V ok?

7.Loop Filter base on customer side application,connect 3300pf to GND is ok?

8.LMK03318 power on sequence have any timing requirement?  Datasheet only have below fig,and PDN Delay doesn't mention long time。 or PDN can rise same time with VDDO_x

BRs

Brian

  • Brian,

    1. Per the datasheet, VDD_DIG is the supply for the STATUS pins:
    2. STATUS0/1 can be configured on the Status page of the GUI:
    3. This is not needed if using the internal 50-Ohm selection, and can be depopulated.
    4. If you follow the evaluation module and use the 50MHz on SECREF, then the REFSEL pin can be either floating or pulled high.
    5. 1k to GND is suitable.
    6. 1k to VDD is suitable.
    7. This is based on the exact application and PLL values, but if in integer mode this capacitance is suitable.
    8. If using a separate supply for VDD and VDDO, I recommend adding a capacitor on PDN and ramping PDN with VDDO. Alternatively, PDN can be driven after VDDO and VDD ramp (with VDD first).

    Thanks,
    Kadeem