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LMX2492EVM: External VCO

Part Number: LMX2492EVM

Tool/software:

Hi TI forum,

I have just connected an external VCO by removing R6 and R3_LF, and connecting RF_out's SMA to VCO RF_out divided by 16 (24 GHz VCO to 1.5 GHz DIV) and TP_Vtune to VCO's Vtune port with a 1nF capacitor to GND. I would like to know if PLL has any other requeriments for connecting an external VCO and if the configuration in TICsPRO when there is a divider should be done.

I can share more info if needed, such as pictures on how everything is connected.

Thanks in advance,

Joaquín.

  • Hi Joaquin,

    In TICS, simply change the VCO frequency to 1.5GHz

    Better use shielded wire to connect TP_Vtune to the Vtune port of the VCO. 

    Make sure the loop filter (R2_LF, C2_LF, C1_LF//1nF) is still appropriate. 

  • Sorry by the delay, after testing that way the voltage we measured in Vtune was 2.1V and it seems it burnt the VCO calibration fuse. So we ordered a new one and replaced it. Now, before closing the loop, we are measuring Vtune, and its nominal voltage is 4.8V which is to high for our VCO (0.35-1.45V). Is there any parameter in TICS PRO that helps regulate Vtune sensitivity? By changing CPM_THR_HIGH and LOW can we affecdirectly the limits of the Vtune voltage?

  • Hi Noel Fung, 

    After some research and reviewing other posts on the forum regarding VCOs operating with varying voltages on Vtune, I believe it may be necessary to configure the setup using external hardware — either through a voltage divider or an attenuating amplifier.

    However, I’ve noticed that during the guided configuration steps in the User Guide, the observable voltages on Vtune used to peak at around 2.8 V. Now, they are reaching the maximum. Could this be because the loop is open and, without feedback, the system causes the control voltage to scale up beyond the usual operating range?

    If that’s the case, I assume that requesting a ramp-down instead of a ramp-up should cause the voltage to drop accordingly, right? But if the voltage still doesn’t drop due to the lack of feedback, would it be reasonable to try applying a stable 1 V to Vtune manually in order to simulate a closed-loop condition for the PLL?

    I’d appreciate your insights on whether this approach is technically sound or if there’s a better way to handle the tuning when the loop is open.

    Thanks in advance for your support,
    Joaquín