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LMX2572: PLL lock time

Koshi Ninomiya
Expert 6025 points

Part Number: LMX2572
Other Parts Discussed in Thread: LMX2592

Tool/software:

Dear Team,

My customer has evaluated the LMX2572.
As a continuing challenge, the lock time of the PLL has become an issue.

The following are the issues they are considering.
・ LMX2572
     - FOSC: 40.96 MHz with partial assist -> VCOcal is 98us
        Measures against measurement variation when implemented in their Measurement Instruments (spurious of PLL Output Signal?) as
        Kpd: 0.625mA, MASH Order: 4th

They want this to be less than 100us including the lock time without Full Assist.

・ Changed Fosc
     - Fosc: 81.92MHz with Partial Assist -> Total 108.3us
       Mash Order: 3rd Loop Gain Change error with FVCO less than 3604.5GHz (resolved in Kpd 1.25mA)
・ Fast calibration on LMX2592
     - Fosc: 40.96 MHz VCOcal30us Total: 90.9us
       If tjey have the same loop filter and same Kpd as LMX2572, they get Loop Gain Change error

They are considering this.
Could you give me some advice?

As for Full Assist, they would like to achieve PLL lock time < 100us without using Full Assist if possible.
Because;
 - To be used as a measuring signal for measuring instruments.
 - This is because they don't know everything about the problems of giving a fixed assist value at their factory.
They think;
 - The value changes as the temperature changes.
 - It also depends on the individual differences of chips.
    And so on.
Therefore, they want to turn on and use VCOcal itself.

Best Regards,

Koshi Ninomiya

  • +1
    TI__Guru** 118860 points

    Hi Ninomiya-san,

    If you stick on partial assist or no assist, you will suffer from longer lock time due to VCO calibration. 

    Partial assist, in general, has shorter lock time than no assist, because we have assigned an initial data for calibration to get started with. Due to part to part variation, if the initial calibration data is far away from the actual, lock time may be longer than usual. Full assist can eliminate this problem as the initial data is taken from a one-time calibration.

    We can reduce the programming time by enabling double buffering. For example, when we are sitting in freq1, we can program the initial calibration data, PLL_N and PLL_NUM for freq2 without affecting the operation at freq1. By the time we want to switch to freq2, all we need to program is R0. 

    To get a shorter PLL lock time, loop bandwidth should be wide and Gamma factor should be close to 1. Use PLL Sim (www.ti.com/.../PLLATINUMSIM-SW) to design the loop filter.